Datasheet > 可编程逻辑 > 可编程逻辑器件> ATF22V10C-10SI

ATF22V10C-10SI

更新时间： 2024-02-04 02:00:16

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程逻辑器件
页数	文件大小	规格书
8页	237K
描述
High Performance E2 PLD

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技术参数
数据手册

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ATF22V10C-10SI 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	TSSOP, TSSOP24,.25
Reach Compliance Code：	compliant	Factory Lead Time：	5 weeks
风险等级：	1.47	Is Samacsys：	N
架构：	PAL-TYPE	最大时钟频率：	90 MHz
JESD-30 代码：	R-PDSO-G24	JESD-609代码：	e3
长度：	7.8 mm	湿度敏感等级：	2
专用输入次数：	10	I/O 线路数量：	10
输入次数：	22	输出次数：	10
产品条款数：	132	端子数量：	24
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	10 DEDICATED INPUTS, 10 I/O	输出函数：	MACROCELL
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP24,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	5 V	可编程逻辑类型：	FLASH PLD
传播延迟：	10 ns	认证状态：	Not Qualified
座面最大高度：	1.2 mm	子类别：	Programmable Logic Devices
最大供电电压：	5.5 V	最小供电电压：	4.5 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	4.4 mm
Base Number Matches：	1

ATF22V10C-10SI 数据手册

Parameter Description

Typ

Max

Units

POWER

Power-Up

Reset Time

600

1,000

REGISTERED

OUTPUTS

Power-Up

Reset

RST

3.8

4.5

Voltage

CLOCK

Preload of Registered Outputs

Security Fuse Usage

The ATF22V10C’s registers are provided with circuitry to

allow loading of each register with either a high or a low.

This feature will simplify testing since any state can be

forced into the registers to control test sequencing. A

JEDEC file with preload is generated when a source file

with vectors is compiled. Once downloaded, the JEDEC

file preload sequence will be done automatically by most

of the approved programmers after the programming.

A single fuse is provided to prevent unauthorized copying

of the ATF22V10C fuse patterns. Once programmed, fuse

verify and preload are inhibited. However, the 64-bit User

Signature remains accessible.

The security fuse should be programmed last, as its effect

is immediate.

Programming/Erasing

Electronic Signature Word

Programming/erasing is performed using standard PLD

programmers. See CMOS PLD Programming Hardware &

Software Support for information on software/program-

ming.

There are 64 bits of programmable memory that are al-

ways available to the user, even if the device is secured.

These bits can be used for user-specific data.

Input and I/O Pin Keeper Circuits

The ATF16V8C contains internal input and I/O pin keeper

circuits. These circuits allow each ATF16V8C pin to hold

its previous value even when it is not being driven by an

external source or by the device’s output buffer. This helps

insure that all logic array inputs are at known, valid logic

levels. This reduces system power by preventing pins

from floating to indeterminate levels. By using pin keeper

circuits rather than pull-up resistors, there is no DC current

required to hold the pins in either logic state (high or low).

These pin keeper circuits are implemented as weak feed-

back inverters, as shown in the Input Diagram below.

These keeper circuits can easily be overdriven by stand-

ard TTL- or CMOS-compatible drivers. The typical over-

drive current required is 40 µA.

Input Diagram

I/O Diagram

ATF22V10C

1...3 4 567 8

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与ATF22V10C-10SI相关器件

型号	品牌	描述	获取价格	数据表
ATF22V10C-10SJ	ATMEL	Flash PLD, 10ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOIC-24	获取价格
ATF22V10C-10SL	ATMEL	Flash PLD, 10ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOIC-24	获取价格
ATF22V10C-10SU	ATMEL	Highperformance EE PLD	获取价格
ATF22V10C-10SU-T	MICROCHIP	Flash PLD, 10ns, CMOS, PDSO24	获取价格
ATF22V10C-10XC	ATMEL	High Performance E2 PLD	获取价格
ATF22V10C-10XI	ATMEL	High Performance E2 PLD	获取价格

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