Datasheet > ATF22V10B-10GM/883#N/A

ATF22V10B-10GM/883#N/A

更新时间： 2024-02-15 19:02:33

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ATF22V10B-10GM/883#N/A 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
可编程逻辑类型：	FLASH PLD	Base Number Matches：	1

Atmel ATF22V10B

Input Test Waveforms and Measurement Levels

t_R, t_F< 3ns

Output Test Loads

Commercial

Military

* All except -7 which is R2 = 300

Pin Capacitance

f = 1MHz, T = 25°C⁽¹⁾

Typ

Max

Units

Conditions

C_IN

V_IN= 0V

C_OUT

V_OUT= 0V

Note:

1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested

Power-up Reset

The registers in the Atmel^®ATF22V10B are designed to reset during power-up. At a point delayed slightly from

V_CCcrossing V_RST, all registers will be reset to the low state. The output state will depend on the polarity of the out-

put buffer.

This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the

uncertainty of how V_CCactually rises in the system, the following conditions are required:

1. The V_CCrise must be monotonic

2. After reset occurs, all input and feedback setup times must be met before driving the clock pin high

3. The clock must remain stable during t_PR

0250M–PLD–7/10

1 2 3 456 7 8...16

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