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ATF16V8B-15PC PDF预览

ATF16V8B-15PC

更新时间: 2024-01-24 07:55:15
品牌 Logo 应用领域
爱特美尔 - ATMEL 闪存
页数 文件大小 规格书
16页 658K
描述
High Performance Flash PLD

ATF16V8B-15PC 数据手册

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ATF16V8B  
Macrocell Configuration  
Software compilers support the three different OMC  
modes as different device types. Most compilers have the  
ability to automatically select the device type, generally  
based on the register usage and output enable (OE) us-  
age. Register usage on the device forces the software to  
choose the registered mode. All combinatorial outputs  
with OE controlled by the product term will force the soft-  
ware to choose the complex mode. The software will  
choose the simple mode only when all outputs are dedi-  
cated combinatorial without OE control. The different de-  
vice types can be used to override the automatic device  
selection by the software. For further details, refer to the  
compiler software manuals.  
In registered mode pin 1 and pin 11 are permanently con-  
figured as clock and output enable, respectively. These  
pins cannot be configured as dedicated inputs in the reg-  
istered mode.  
In complex mode pin 1 and pin 11 become dedicated in-  
puts and use the feedback paths of pin 19 and pin 12 re-  
spectively. Because of this feedback path usage, pin 19  
and pin 12 do not have the feedback option in this mode.  
In simple mode all feedback paths of the output pins are  
routed via the adjacent pins. In doing so, the two inner  
most pins (pins 15 and 16) will not have the feedback op-  
tion as these pins are always configured as dedicated  
combinatorial output.  
When using compiler software to configure the device, the  
user must pay special attention to the following restrictions  
in each mode.  
ATF16V8B Registered Mode  
PAL Device Emulation / PAL Replacement  
sum term. When the macrocell is configured as an input,  
the output enable is permanently disabled.  
The registered mode is used if one or more registers are  
required. Each macrocell can be configured as either a  
registered or combinatorial output or I/O, or as an input.  
For a registered output or I/O, the output is enabled by the  
OE pin, and the register is clocked by the CLK pin. Eight  
product terms are allocated to the sum term. For a combi-  
natorial output or I/O, the output enable is controlled by a  
product term, and seven product terms are allocated to the  
Any register usage will make the compiler select this  
mode. The following registered devices can be emulated  
using this mode:  
16R8 16RP8  
16R6 16RP6  
16R4 16RP4  
Combinatorial Configuration for  
Registered Mode (1, 2)  
Registered Configuration  
for Registered Mode(1, 2)  
Notes:  
Notes:  
1. Pin 1 and Pin 11 are permanently configured as CLK and  
OE.  
2. The development software configures all the architecture  
control bits and checks for proper pin usage automatically.  
1. Pin 1 controls common CLK for the registered outputs.  
Pin 11 controls common OE for the registered outputs.  
Pin 1 and Pin 11 are permanently configured as CLK and OE.  
2. The development software configures all the architecture  
control bits and checks for proper pin usage automatically.  
1-13  

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