Datasheet > ATF1508BE-5AX100

ATF1508BE-5AX100

更新时间： 2022-12-16 18:35:14

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
30页	769K
描述
Highperformance CPLD

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数据手册

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ATF1508BE-5AX100 数据手册

Features

• High-density, High-performance Fully CMOS, Electrically-erasable Complex

Programmable Logic Device

– 128 Macrocells

– 5.0 ns Pin-to-pin Propagation Delay

– Registered Operation up to 333 MHz

– Enhanced Routing Resources

– Optimized for 1.8V Operation

– 2 I/O Banks to Facilitate Multi-voltage I/O Operation: 1.5V, 1.8V, 2.5V, 3.3V

– SSTL2 and SSTL3 I/O Standards

• In-System Programming (ISP) Supported

– ISP Using IEEE 1532 (JTAG) Interface

– IEEE 1149.1 JTAG Boundary Scan Test

• Flexible Logic Macrocell

High-

performance

CPLD

– D/T/Latch Configurable Flip-flops

– 5 Product Terms per Macrocell, Expandable up to 40

– Global and Individual Register Control Signals

– Global and Individual Output Enable

– Programmable Output Slew Rate with Low Output Drive

– Programmable Open Collector Output Option

– Maximum Logic Utilization by Burying a Register with a Combinatorial Output and

Vice Versa

ATF1508BE

• Fully Green (RoHS Compliant)

• As Low As 10 µA Standby Current

• Power Saving Option During Operation Using PD1 and PD2 Pins

• Programmable Pin-keeper Option on Inputs and I/Os

• Programmable Schmitt Trigger Input Option on Input and I/O Pins

• Programmable Input and I/O Pull-up Option

• Unused I/O Pins Can Be Configured as Ground (Optional)

• Available in Commercial and Industrial Temperature Ranges

• Available in 100-lead TQFP and 132-ball CBGA

• Advanced Digital CMOS Technology

– 100% Tested

– Completely Reprogrammable

– 10,000 Program/Erase Cycles

– 20-year Data Retention

– 2000V ESD Protection

– 200 mA Latch-up Immunity

• Security Fuse Feature

• Hot-Socketing Supported

3663A–PLD–1/08

12 3 4 5 6 7...30

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