Datasheet > 可编程逻辑 > 可编程逻辑器件> ATF1508ASV-15QC100

ATF1508ASV-15QC100

更新时间： 2024-02-03 15:38:45

品牌	Logo	应用领域
爱特美尔 - ATMEL		可编程逻辑器件输入元件时钟
页数	文件大小	规格书
22页	500K
描述
Highperformance EE PLD

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

ATF1508ASV-15QC100 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	QFP, QFP100,.7X.9
针数：	100	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.74
其他特性：	YES	最大时钟频率：	100 MHz
系统内可编程：	YES	JESD-30 代码：	R-PQFP-G100
JESD-609代码：	e0	JTAG BST：	YES
长度：	20 mm	湿度敏感等级：	3
专用输入次数：		I/O 线路数量：	80
宏单元数：	128	端子数量：	100
最高工作温度：	70 °C	最低工作温度：
组织：	0 DEDICATED INPUTS, 80 I/O	输出函数：	MACROCELL
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP100,.7X.9	封装形状：	RECTANGULAR
封装形式：	FLATPACK	峰值回流温度（摄氏度）：	225
电源：	3.3 V	可编程逻辑类型：	EE PLD
传播延迟：	15 ns	认证状态：	Not Qualified
座面最大高度：	3.4 mm	子类别：	Programmable Logic Devices
最大供电电压：	3.6 V	最小供电电压：	3 V
标称供电电压：	3.3 V	表面贴装：	YES
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	14 mm	Base Number Matches：	1

ATF1508ASV-15QC100 数据手册

浏览型号ATF1508ASV-15QC100的Datasheet PDF文件第4页

浏览型号ATF1508ASV-15QC100的Datasheet PDF文件第5页

浏览型号ATF1508ASV-15QC100的Datasheet PDF文件第6页

浏览型号ATF1508ASV-15QC100的Datasheet PDF文件第8页

浏览型号ATF1508ASV-15QC100的Datasheet PDF文件第9页

浏览型号ATF1508ASV-15QC100的Datasheet PDF文件第10页

ATF1508ASV(L)

fuse verify is inhibited. However, User Signature and

device ID remains accessible.

Design Software Support

ATF1508ASV(L) designs are supported by several third-

party tools. Automated fitters allow logic synthesis using a

variety of high-level description languages and formats.

Programming

ATF1508ASV(L) devices are in-system programmable

(ISP) devices utilizing the 4-pin JTAG protocol. This capa-

bility eliminates package handling normally required for

programming and facilitates rapid design iterations and

field changes.

Power-up Reset

The ATF1508ASV is designed with a power-up reset, a

feature critical for state machine initialization. At a point

delayed slightly from V_CCcrossing V_RST, all registers will be

initialized, and the state of each output will depend on the

polarity of its buffer. However, due to the asynchronous

nature of reset and uncertainty of how V_CCactually rises in

the system, the following conditions are required:

Atmel provides ISP hardware and software to allow pro-

gramming of the ATF1508ASV(L) via the PC. ISP is per-

formed by using either a download cable, a comparable

board tester or a simple microprocessor interface.

To allow ISP programming support by the Automated Test

Equipment (ATE) vendors, Serial Vector Format (SVF) files

can be created by the Atmel ISP software. Conversion to

other ATE tester format beside SVF is also possible

1. The V_CCrise must be monotonic,

2. After reset occurs, all input and feedback setup

times must be met before driving the clock pin

high, and,

ATF1508ASV(L) devices can also be programmed using

standard third-party programmers. With third-party pro-

grammer, the JTAG ISP port can be disabled thereby

allowing four additional I/O pins to be used for logic.

3. The clock must remain stable during T_D.

The ATF1508ASV has two options for the hysteresis about

the reset level, V_RST, Small and Large. To ensure a robust

operating environment in applications where the device is

operated near 3.0V, Atmel recommends that during the fit-

ting process users configure the device with the Power-up

Reset hysteresis set to Large. For conversions, Atmel

POF2JED users should include the flag “-power_reset” on

the command line after “filename.POF”. To allow the regis-

ters to be properly reinitialized with the Large hysteresis

option selected, the following condition is added:

Contact your local Atmel representatives or Atmel PLD

applications for details.

ISP Programming Protection

The ATF1508ASV(L) has a special feature that locks the

device and prevents the inputs and I/O from driving if the

programming process is interrupted for any reason. The

inputs and I/O default to high-Z state during such a condi-

tion. In addition the pin-keeper option preserves the former

state during device programming.

4. If V_CCfalls below 2.0V, it must shut off com-

pletely before the device is turned on again.

When the Large hysteresis option is active, I_CCis reduced

by several hundred microamps as well.

All ATF1508ASV(L) devices are initially shipped in the

erased state thereby making them ready to use for ISP.

Security Fuse Usage

A single fuse is provided to prevent unauthorized copying

of the ATF1508ASV(L) fuse patterns. Once programmed,

Note:

For more information refer to the “Designing for In-Sys-

tem Programmability with Atmel CPLDs” application

note.

1...4 5 678 9 10...22

下载PDF

与ATF1508ASV-15QC100相关器件

型号	品牌	描述	获取价格	数据表
ATF1508ASV-15QC160	ATMEL	Highperformance EE PLD	获取价格
ATF1508ASV-15QI100	ATMEL	Highperformance EE PLD	获取价格
ATF1508ASV-15QI160	ATMEL	Highperformance EE PLD	获取价格
ATF1508ASV-15QJ100	ATMEL	EE PLD, 15ns, PQFP100, 14 X 20 MM, 0.65 MM PITCH, PLASTIC, MS-022GC-1, QFP-100	获取价格
ATF1508ASV-15QJ160	ATMEL	EE PLD, 15ns, PQFP160, 28 X 28 MM, 0.65 MM PITCH, PLASTIC, MS-022DC-1, QFP-160	获取价格
ATF1508ASV-15QL100	ATMEL	EE PLD, 15ns, PQFP100, 14 X 20 MM, 0.65 MM PITCH, PLASTIC, MS-022GC-1, QFP-100	获取价格

与ATF1508ASV-15QC100相关文章

STM32F030C6芯片介绍：主要参数分析、引脚配置说明、功耗及封装
2024-05-11

6
PCF8591数据手册解读：参数、引脚说明
2024-05-11

8
一文带你了解ss8050参数、引脚配置、应用指南
2024-05-11

5
深入解析AD7606高性能多通道模数转换器：资料手册参数分析
2024-05-10

7

产品中心

服务支持

精选活动

关于我们

帮助中心

ATF1508ASV-15QC100

ATF1508ASV-15QC100 技术参数

ATF1508ASV-15QC100 数据手册

与ATF1508ASV-15QC100相关器件

与ATF1508ASV-15QC100相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

ATF1508ASV-15QC100

ATF1508ASV-15QC100 技术参数

ATF1508ASV-15QC100 数据手册

与ATF1508ASV-15QC100相关器件

与ATF1508ASV-15QC100相关文章

您还可以找

您在本页遇到什么问题？