Datasheet > ATF1502ASL

ATF1502ASL

更新时间： 2023-12-06 20:08:09

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
29页	956K
描述
Low-power, Vcc 5V, 32 MC, ISP, Green package, CPLD

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ATF1502ASL 数据手册

ATF1502AS and ATF1502ASL

High-performance EEPROM

Complex Programmable Logic Device

DATASHEET

Features

 High-density, High-performance, Electrically-erasable Complex Programmable

Logic Device

32 Macrocells

5 Product Terms per Macrocell, Expandable up to 40 per Macrocell

44 Pins

7.5ns Maximum Pin-to-pin Delay

Registered Operation up to 125MHz

Enhanced Routing Resources

 In-System Programmability (ISP) via JTAG

 Flexible Logic Macrocell

D/T Latch Configurable Flip-flops

Global and Individual Register Control Signals

Global and Individual Output Enable

Programmable Output Slew Rate

Programmable Output Open Collector Option

Maximum Logic Utilization by Burying a Register with a COM Output

 Advanced Power Management Features

Automatic 10μA Standby for “L” Version

Pin-controlled 1mA Standby Mode

Programmable Pin-keeper Inputs and I/Os

Reduced-power Feature per Macrocell

 Available in Commercial and Industrial Temperature Ranges

 Available in 44-lead PLCC and 44-lead TQFP

 Advanced EEPROM Technology

100% Tested

Completely Reprogrammable

10,000 Program/Erase Cycles

20 Year Data Retention

2000V ESD Protection

200mA Latch-up Immunity

 JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993

Supported

 PCI-compliant

 Security Fuse Feature

 Green (Pb/Halide-fee/RoHS Compliant) Package Options

Atmel-0995L-CPLD-ATF1502AS(L)-Datasheet_032014

12 3 4 5 6 7...29

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