Datasheet > ATA6832_10

ATA6832_10

更新时间： 2022-10-12 01:06:30

品牌	Logo	应用领域
爱特美尔 - ATMEL		驱动器
页数	文件大小	规格书
17页	375K
描述
Three Half-bridge Outputs Formed by Three High-side and Three Low-side Drivers

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ATA6832_10 数据手册

ATA6832

Table 3-2.

Output Data Protocol

Output (Status)

Bit

Function

Temperature prewarning: high = warning

Normal operation: high = output is on, low = output is off

Open-load detection: high = open load, low = no open load

(correct load condition is detected if the corresponding output is

switched off); not affected by SRR

Status LS1

Status HS1

Normal operation: high = output is on, low = output is off

Open-load detection: high = open load, low = no open load

(correct load condition is detected if the corresponding output is

switched off); not affected by SRR

Status LS2

Status HS2

Status LS3

Status HS3

n. u.

Description see LS1

Description see HS1

Description see LS1

Description see HS1

Not used

n. u.

Not used

n. u.

Not used

n. u.

Not used

n. u.

Not used

n. u.

Not used

Over-load detected: set high, when at least one output is switched off

by a short-circuit condition or an overtemperature event. Bits 1 to 6 can

be used to detect the affected switch

OVL

Inhibit: this bit is controlled by software (bit SI in input register)

High = standby, low = normal operation

INH

PSF

Power-supply fail: undervoltage at pin VS detected

After power-on reset, the input register has the following status:

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9

Bit 8

PH1

Bit 7

PL1

Bit 6

HS3

Bit 5

LS3

Bit 4

HS2

Bit 3 Bit 2 Bit 1 Bit 0

OCS

OLD

PH3

PL3

PH2

PL2

LS2

HS1

LS1

SRR

The following patterns are used to enable internal test modes of the IC. Do not use these pat-

terns during normal operation.

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9

(OCS)

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3 Bit 2 Bit 1

Bit 0

(HS3) (LS3) (HS2) (LS2) (HS1) (LS1) (SRR)

4951F–AUTO–07/10

1 2 3 456 7 8...17

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