3.
Functional Description
Figure 1-1 on page 3 and Figure 1-2 on page 4 show the interconnections between the microcontroller and the RF part for a
typical application. In the recommended application circuits the clock output of the RF transmitter is connected to the
microcontroller in order to be able to generate data rate with tolerance lower than 3%. The transmitter’s crystal oscillator
(XTO), phase locked loop (PLL) and clock generation are started using pin ENABLE. The power amplifier (PA) is activated
using the connection to the pin PA_ENABLE. The FSK modulation is performed due to pulling of the crystal load capacitance
for this purpose the microcontroller out put port together with an external switch applies this modulation technique. For the
ASK modulation the power amplifier will be switched on and of by modulating the PA_ENABLE pin due to the data.
To wake up the system from standby mode at least one event is required, which will be performed by pushing tone button.
After this event the microcontroller starts up with the internal RC oscillator. For the TX operation the user software must
additionally control just 2 pins, the pin ENABLE and pin PA_ENABLE. In case of the FSK modulation one additional
connection from microcontroller is necessary to perform the pulling of the crystal load capacitance.
If ENABLE and PA_ENABLE are set to LOW the transmitter is in standby mode with the suitable mode setting of the
microcontroller (MCU) the power consumption will be reduced.
If ENABLE is set to HIGH and PA_ENABLE to LOW, the XTO, PLL, and the Clock driver of the RF transmitter are activated
and the VCO frequency is 32 times the XTO frequency. The Atmel ATA5771 and Atmel ATA5774 require typically shorter
than 1 ms until the PLL is locked and the transmitter’s clock output is stable, while the Atmel ATA5773 requires time shorter
than 3 ms for this progress.
If both ENABLE and PA_ENABLE are set to HIGH the whole RF transmitter (XTO, PLL, Clock driver and power Amplifier) is
activated. The ASK modulation is achieved by switching on and off the power amplifier via pin PA_ENABLE. The FSK
modulation is performed by pulling the crystal load capacitor which will change the reference frequency of the PLL due to the
data. The microcontroller modulates the load capacitance of the crystal using an external switch. A MOS transistor with a low
parasitic capacitance is recommended to be used for this purpose. During the FSK modulation is the PA_ENABLE pin set to
HIGH.
To generate the data for the telegram the internal RC oscillator of the microcontroller is not accurate enough because this
will be affected by ambient temperature and operating voltage. To reduce the variation of the data rate lower than 3% the
clock frequency generated by the RF transmitter should be used as a reference. The MCU has to wait at least longer than
3ms for ATA5773 after setting ENABLE to HIGH, before the clock output from the RF transmitter can be used. For ATA5771
and ATA5774 the MCU must wait longer than 1 ms until the clock output is stable. The clock output with the crystal tolerance
is connected to the timer0 of the MCU. This timer clocks the USI to generate the data rate. In the Two serial synchronous
data transfer modes will be provided by USI. This will be pass out with different physical I/O ports, two wire mode is used for
ASK and the three wire mode for FSK.
3.1
Frequency Generation
In Atmel ATA5773 and Atmel ATA5774 the VCO is locked to 32 times crystal frequency hence the following crystal is
needed
●
●
9.8438MHz for 315MHz application
13.56MHz for 433.92MHz application
The VCO of ATA5771 is locked to 64 times crystal frequency therefore the necessary crystal frequency is
●
●
13.5672MHz for 868.3MHz application
14.2969MHz for 915MHz application
Due to the high integration the PLL and VCO peripheral elements are integrated.
The XTO is a series resonance oscillator that only one capacitor together with a crystal connected in series to GND are
needed as external elements. Until the PLL and clock output is stable the following time can be expected
●
●
3ms for ATA5773
1ms for ATA5771 and ATA5774
Therefore, a time delay of ≥ 3 ms for ATA5773 and ≥ 1ms for ATA5771/74 between activation of pin ENABLE and switching
on the pin PA_ENABLE must be implemented in the software.
8
ATA5771C/73C/74C [DATASHEET]
9137I–RKE–08/14