Datasheet > AT86RF230_07

AT86RF230_07

更新时间： 2022-12-20 06:54:35

品牌	Logo	应用领域
爱特美尔 - ATMEL		无线
页数	文件大小	规格书
98页	959K
描述
Low Power 2.4 GHz Radio Transceiver for ZigBee™ and IEEE 802.15.4™ Applications

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AT86RF230_07 数据手册

AT86RF230

AVDD, DVDD

AVDD and DVDD are outputs of the internal 1.8V voltage regulators. The voltage

regulators are controlled independently by the radio transceivers state machine and are

activated depending on the current radio transceiver state. The voltage regulators can

be configured for external supply. For details refer to section 9.4.

AVSS, DVSS

AVSS and DVSS are analog and digital ground pins respectively.

The analog and digital power domains should be separated on the PCB, for further

details see application note AVR2005 "Design Considerations for the AT86RF230".

4.2 Analog and RF Pins

RFP, RFN

A differential RF port (RFP/RFN) provides common-mode rejection to suppress the

switching noise of the internal digital signal processing blocks. At the board-level, the

differential RF layout ensures high receiver sensitivity by rejecting any spurious

interspersions originating from other digital ICs such as a microcontroller.

The RF port is designed for a 100Ω differential load. A DC path between the RF pins is

allowed. A DC path to ground or supply voltage is not allowed. Therefore, when

connecting a RF-load providing a DC path to the power supply or to ground, capacitive

coupling is required as indicated in Table 4-2.

A simplified schematic of the RF front end is shown in Figure 4-1.

Figure 4-1. Simplified RF Front-End Schematic

PCB AT86RF230

LNA

RFP

RFN

0.9V

Feedback

RXTX

RF port DC values depend on the operating mode. In TRX_OFF state (see section

7.1.2), when the analog front end is disabled, the RF pins are pulled to ground,

preventing a floating voltage.

5131D-ZIGB-12/03/07

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