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AT83C5103XXX-IBSIL PDF预览

AT83C5103XXX-IBSIL

更新时间: 2024-02-15 23:36:18
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爱特美尔 - ATMEL 微控制器
页数 文件大小 规格书
64页 684K
描述
Low-pin Count 8-bit Microcontroller

AT83C5103XXX-IBSIL 数据手册

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Figure 30. ICC Test Condition, Idle Mode  
VCC  
ICC  
VCC  
Reset = Vcc after a low pulse  
during at least 24 clock cycles  
VCC  
RST  
(NC)  
XTAL2  
XTAL1  
VSS  
CLOCK  
SIGNAL  
All other pins are disconnected  
Figure 31. ICC Test Condition, Power-Down Mode  
VCC  
ICC  
VCC  
Reset = Vcc after a low pulse  
during at least 24 clock cycles  
V
CC  
RST  
All other pins are disconnected.  
XTAL2  
XTAL1  
VSS  
Figure 32. Clock Signal Waveform for ICC Tests in Active and Idle Modes  
VCC-0.5V  
0.7VCC  
0.45V  
TCHCL  
0.2VCC-0.1  
TCLCH  
TCLCH = TCHCL = 5ns  
AC Parameters  
Explanation of the AC  
Symbols  
Each timing symbol has 5 characters. The first character is always a “T” (stands for  
Time). The other characters, depending on their positions, stand for the name of a sig-  
nal or the logical status of that signal. The following is a list of all the characters and  
what they stand for.  
Example: TXHDV = Time from clock rising edge to input data valid.  
TA = -40°C to +125°C (Automotive temperature range); VSS = 0V; 3.135V < VCC < 3.465V  
The maximum applicable load capacitance for Port 1 and 3 is 80 pF. Timings will be  
guaranteed if these capacitances are respected. Higher capacitance values can be  
used, but timings will then be degraded.  
58  
AT8xC5103  
4134C–8051–09/04  

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