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AT27C256R-70JU-306 PDF预览

AT27C256R-70JU-306

更新时间: 2024-02-01 17:53:06
品牌 Logo 应用领域
美国微芯 - MICROCHIP OTP只读存储器内存集成电路
页数 文件大小 规格书
13页 822K
描述
IC OTP 256KBIT 70NS 32PLCC

AT27C256R-70JU-306 技术参数

生命周期:Active包装说明:QCCJ,
Reach Compliance Code:compliant风险等级:2.17
最长访问时间:70 nsJESD-30 代码:R-PQCC-J32
长度:13.97 mm内存密度:262144 bit
内存集成电路类型:OTP ROM内存宽度:8
功能数量:1端子数量:32
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL座面最大高度:3.556 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD宽度:11.43 mm
Base Number Matches:1

AT27C256R-70JU-306 数据手册

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2.  
Pin configurations  
32-lead PLCC  
Top view  
28-lead PDIP  
Top view  
Pin name  
A0 - A14  
O0 - O7  
CE  
Function  
Addresses  
Outputs  
VPP  
A12  
A7  
1
2
3
4
5
6
7
8
9
28 VCC  
27 A14  
26 A13  
25 A8  
24 A9  
23 A11  
22 OE  
21 A10  
20 CE  
19 O7  
18 O6  
17 O5  
16 O4  
15 O3  
Chip enable  
Output enable  
No connect  
A6  
A5  
A4  
A3  
A2  
5
6
7
8
9
29 A8  
28 A9  
27 A11  
26 NC  
25 OE  
24 A10  
23 CE  
22 O7  
21 O6  
A6  
OE  
A5  
NC  
A4  
A3  
A1 10  
A0 11  
NC 12  
O0 13  
A2  
A1  
A0 10  
O0 11  
O1 12  
O2 13  
GND 14  
Note:  
PLCC package pins 1  
and 17 are “don’t  
connect”  
3.  
System considerations  
Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless  
accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance.  
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This  
capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible.  
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic  
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as  
close as possible to the point where the power supply is connected to the array.  
Figure 3-1.  
Block diagram  
Atmel AT27C256R  
2
0014O–EPROM–10/11  

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