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AS29LV016JBRG-55/ET PDF预览

AS29LV016JBRG-55/ET

更新时间： 2024-02-13 20:07:47
品牌 Logo 应用领域
AUSTIN 闪存内存集成电路光电二极管
页数 文件大小 规格书
40页 408K
描述
16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory

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AS29LV016JBRG-55/ET 技术参数

是否Rohs认证： 不符合生命周期：Active
零件包装代码：TSOP1包装说明：TSOP1, TSSOP56,.8,20
针数：48Reach Compliance Code：compliant
ECCN代码：3A001.A.2.CHTS代码：8542.32.00.51
风险等级：5.47最长访问时间：55 ns
其他特性：BOTTOM BOOT BLOCK备用内存宽度：8
启动块：BOTTOM命令用户界面：YES
通用闪存接口：YES数据轮询：YES
JESD-30 代码：R-XDSO-G48长度：18.4 mm
内存密度：16777216 bit内存集成电路类型：FLASH
内存宽度：16功能数量：1
部门数/规模：1,2,1,31端子数量：48
字数：1048576 words字数代码：1000000
工作模式：ASYNCHRONOUS最高工作温度：125 °C
最低工作温度：-55 °C组织：1MX16
封装主体材料：UNSPECIFIED封装代码：TSOP1
封装等效代码：TSSOP56,.8,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
编程电压：3 V认证状态：Not Qualified
就绪/忙碌：YES座面最大高度：1.2 mm
部门规模：16K,8K,32K,64K最大待机电流：0.00001 A
子类别：Flash Memories最大压摆率：0.03 mA
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
切换位：YES类型：NOR TYPE
宽度：12 mmBase Number Matches：1

AS29LV016JBRG-55/ET 数据手册

 浏览型号AS29LV016JBRG-55/ET的Datasheet PDF文件第4页浏览型号AS29LV016JBRG-55/ET的Datasheet PDF文件第5页浏览型号AS29LV016JBRG-55/ET的Datasheet PDF文件第6页浏览型号AS29LV016JBRG-55/ET的Datasheet PDF文件第8页浏览型号AS29LV016JBRG-55/ET的Datasheet PDF文件第9页浏览型号AS29LV016JBRG-55/ET的Datasheet PDF文件第10页 
COTS PEM  
BOOT SECTOR FLASH  
Austin Semiconductor, Inc.  
AS29LV016J  
An erase operation can erase one sector, multiple sectors,  
or the entire device. Table 2 on page 9 and Table 3 on  
page 10 indicate the address space that each sector  
occupies. A“sector address” consists of the address bits  
required to uniquely select a sector. The Command  
Definitions on page 17 has details on erasing a sector or  
the entire chip, or suspending/resuming the erase  
operation.  
REQUIREMENTS FOR READING  
ARRAY DATA  
To read array data from the outputs, the system must  
drive the CE# and OE# pins to VIL. CE# is the power  
control and selects the device. OE# is the output control  
and gates array data to the output pins. WE# should  
remain at VIH. The BYTE# pin determines whether the  
device outputs array data in words or bytes.  
After the system writes the autoselect command  
sequence, the device enters the autoselect mode. The  
system can then read autoselect codes from the internal  
register (which is separate from the memory array) on  
DQ7–DQ0. Standard read cycle timings apply in this  
mode. Refer to Autoselect Mode on page 11 and  
Autoselect Command Sequence on page 17 for more  
information.  
The internal state machine is set for reading array data  
upon device power-up, or after a hardware reset. This  
ensures that no spurious alteration of the memory content  
occurs during the power transition. No command is  
necessary in this mode to obtain array data. Standard  
microprocessor read cycles that assert valid addresses  
on the device address inputs produce valid data on the  
device data outputs. The device remains enabled for read  
access until the command register contents are altered.  
ICC2 in the DC Characteristics table represents the active  
current specification for the write mode. AC  
Characteristics on page 29 contains timing specification  
tables and timing diagrams for write operations.  
See ReadingArray Data on page 17 for more information.  
Refer to the AC Read Operations on page 29 for timing  
specifications and to Figure 12, on page 29 for the timing  
diagram. ICC1 in the DC Characteristics table represents  
the active current specification for reading array data.  
PROGRAM AND ERASE  
OPERATION STATUS  
During an erase or program operation, the system may  
check the status of the operation by reading the status  
bits on DQ7–DQ0. Standard read cycle timings and ICC  
read specifications apply. Refer to Write Operation Status  
on page 22 for more information, and to AC  
Characteristics on page 29 for timing diagrams.  
WRITING COMMANDS / COMMAND  
SEQUENCES  
To write a command or command sequence (which  
includes programming data to the device and erasing  
sectors of memory), the system must drive WE# and  
CE# to VIL, and OE# to VIH.  
For program operations, the BYTE# pin determines  
whether the device accepts program data in bytes or  
words. See Word Byte Configuration on page 6 for more  
information.  
The device features an Unlock Bypass mode to facilitate  
faster programming. Once the device enters the Unlock  
Bypass mode, only two write cycles are required to  
program a word or byte, instead of four. Word Byte  
Program Command Sequence on page 18 has details  
on programming data to the device using both standard  
and Unlock Bypass command sequences.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS29LV016J  
Rev. 0.0 02/09  
7
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AS29LV016JBRGR-55/ET AUSTIN 16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory

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