Datasheet > AS1335-BTDT-100

AS1335-BTDT-100

更新时间： 2024-01-03 11:46:14

品牌	Logo	应用领域
艾迈斯 - AMSCO		转换器
页数	文件大小	规格书
18页	1650K
描述
1.5A, 1.5MHz, Synchronous DC/DC Step-Down Converter

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技术参数
数据手册

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AS1335-BTDT-100 技术参数

生命周期：	Unknown	Reach Compliance Code：	unknown
风险等级：	5.76	Base Number Matches：	1

AS1335-BTDT-100 数据手册

AS1335

Datasheet - Pinout

4 Pinout

Pin Assignments

Figure 2. Pin Assignments (Top View)

VIN

10 SW

PGND

AS1335

GND

POK

GND

RSI

Pin Descriptions

Table 1. Pin Descriptions

Pin Name

Number

Description

Positive Supply Voltage. This pin must be closely decoupled to PGND with a ≥ 22µF

ceramic capacitor.

VIN

Not Connected.

Enable Input. Driving this pin above 1.4V enables the device. Driving this pin below 0.3V

puts the device in shutdown mode. In shutdown mode all functions are disabled, drawing

≤1µA supply current.

Note: This pin should not be left floating.

Power-OK Output. Open-drain output with 215ms delay. Connect a 100kΩ pull-up resistor

to VOUT or pin VIN for logic levels. Leave this pin unconnected if the Power-OK feature is

not used.

LOW Signal: Out of regulation

HIGH signal: Within Regulation (after 215ms delay)

POK

GND

Analog Ground.

Reset Input for POK. This input resets the 215ms timer of the POK signal.

As long as RSI is low the POK signal will work as described above.

A high input to RSI will reset the 215ms POK timer and delay the signal as long as RSI

stays high. A RSI low-to-high transition restarts the 215ms counter as long as the output

voltage is within regulation.

RSI

Note: Do not leave this pin floating.

Feedback Pin. Feedback input to the gm error amplifier. Connect a resistor divider tap to

this pin. The output can be adjusted from 0.6V to 5.25V by VOUT = 0.6V[1+(R1/R2)].

If the fixed output voltage version is used, connect this pin to VOUT.

Analog Ground. GND and PGND should only have one point connection.

Power-Ground. Connect all power grounds to this pin.

GND

PGND

Switch Node Connection to Inductor. This pin connects to the drains of the internal main

and synchronous power MOSFET switches.

Exposed Pad. The exposed pad must be connected to PGND. Ensure a good connection

to the PCB to achieve optimal thermal performance.

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Revision 1.02

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