Datasheet > APE6312

APE6312

更新时间： 2024-02-25 03:13:23

品牌	Logo	应用领域
APLUS		/
页数	文件大小	规格书
6页	242K
描述
very low cost voice and melody synthesizer with 4-bits CPU

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技术参数
数据手册

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APE6312 技术参数

生命周期：	Contact Manufacturer	包装说明：	, DIE OR CHIP
Reach Compliance Code：	unknown	风险等级：	5.7
封装等效代码：	DIE OR CHIP	电源：	3 V
认证状态：	Not Qualified	子类别：	Audio Synthesizer ICs
技术：	CMOS	Base Number Matches：	1

APE6312 数据手册

APExx12 Series

1.0 General Description

The APExx12 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various

features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody

synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one

voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.

With CMOS technology and halt function can minimize power dissipation. Their architectures are similar

to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single

cycle, except for program branches and data table read instructions (which need two instruction cycles).

2.0 Features

(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.

(2) Program ROM: 16k x 10 bits

(3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 18-bits

VPR can access up to 256k x 10 bits voice data memory space.

Product

APE0612

APE1012

APE1512

APE2012

APE3112

APE4112

APE5212

APE6312

APE7312

APE8412

Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit)

14-bits

15-bits

16-bits

17-bits

18-bits

20k

32k

48k

64k

96k

128k

160k

192k

224k

256k

(4) Data Registers:

a). 128 x 4-bit data RAM (00-7Fh)

b). Unbanked special function registers (SFR) range: 00h-2Fh

(5) I/O Ports:

a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Register control)

b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)

c). PRD: 4-bits I/O Port D (15h) can be programmed to input/output individually. (Register control)

(6) On-chip clock generator: Resistive Clock Drive (RM)

(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).

(8) Stack: 2-level subroutine nesting.

(9) Built-in 4 Level Volume Control can be programmed.

Rev 1.3

2003/8/18

123 4 5 6

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