Datasheet > AP1212LSA

AP1212LSA

更新时间： 2024-02-15 21:31:47

品牌	Logo	应用领域
美台 - DIODES		光电二极管
页数	文件大小	规格书
11页	246K
描述
Power Management Circuit, PDSO8,

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AP1212LSA 技术参数

生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	SOP,	针数：	8
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.77
高边驱动器：	YES	接口集成电路类型：	HALF BRIDGE BASED MOSFET DRIVER
JESD-30 代码：	R-PDSO-G8	长度：	5.05 mm
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
标称输出峰值电流：	1 A	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	认证状态：	Not Qualified
座面最大高度：	1.75 mm	最大供电电压：	5.5 V
最小供电电压：	2.7 V	标称供电电压：	5 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	断开时间：	10 µs
宽度：	3.9 mm	Base Number Matches：	1

AP1212LSA 数据手册

AP1212

Dual USB High-Side Power Switch

Features

General Description

- Compliant to USB specifications

- Dual independent switches control

- 2.7V to 5.5V input voltage

The AP1212 series are dual integrated high-side

power switch with independent enable and flag

functions, optimized for self-powered and

- 500mA minimum continuous current per port

- 110mΩ typical on-resistance

bus-powered

Universal

Serial Bus (USB)

applications. The AP1212 series support the

following USB requirements: each switch channel

supplies up to 500mA as required by USB

downstream devices; the switch’s low on-resistance

meets USB voltage drop requirements; fault current

is limited to typically 1000mA, well below the UL

25VA safety requirements; and a flag output is

available to indicate fault conditions to the local

USB controller. Soft start eliminates the momentary

voltage drop on the upstream port that may occur

when the switch is enabled in bus-powered

applications.

- 1.25A maximum short circuit current limit

- Independent open-drain fault flag pins

- 110μA typical on-state supply current

- 1μA typical off-state supply current

- Output can be forced higher than input (off-state)

- Thermal shutdown

- 2.4V typical under voltage lockout (UVLO)

- 1ms turn-on (soft-start) and fast turn-off

- Enable active-high (H) or active-low (L)

- 8-pin SOP and PDIP packages

Additional features include thermal shutdown to

prevent catastrophic switch failure from high-current

loads, under voltage lockout (UVLO) to ensure that

the device remains off unless there is a valid input

voltage present, and 3.3V and 5V logic compatible

enable inputs.

Applications

• USB hubs

• Hot plug-in power supplies

• Battery-charger circuits

Pin Assignments

Pin Descriptions

Name

Description

Enable: Logic-compatible enable

input. ( H: active high, L: active low).

Do not float.

(Top View)

EN1

EN2

EN1 1

FLG1 2

FLG2 3

8 OUT1

7 IN

Fault Flag: Active-low, open-drain

output. Indicates over current,

UVLO, and thermal shutdown.

FLG1

FLG2

AP1212

GND

Supply return.

GND

Supply Input: Output MOSFET drain.

Also supplies IC’s internal circuitry.

Connect to positive supply.

Switch Output: Output MOSFET

source. Typically connect to

switched side of load.

EN2

5 OUT2

OUT1

OUT2

PDIP/SOP

This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of

this product. No rights under any patent accompany the sale of the product.

Rev. 1.0 Sep.23, 2004

1/11

12 3 4 5 6 7...11

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