DATA SHEET
COMPOUND TRANSISTOR
AN1A4Z
on-chip resistor PNP silicon epitaxial transistor
For mid-speed switching
FEATURES
PACKAGE DRAWING (UNIT: mm)
•
On-chip bias resistor
(R1 = 10 kΩ)
•
Complementary transistor with AA1A4Z
ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
Parameter
Symbol
VCBO
VCEO
VEBO
IC(DC)
IC(pulse) *
PT
Ratings
−60
Unit
V
Collector to base voltage
Collector to emitter voltage
Emitter to base voltage
Collector current (DC)
Collector current (Pulse)
Total power dissipation
Junction temperature
Storage temperature
−50
V
−5
V
−100
−200
250
mA
mA
mW
°C
°C
Tj
150
−55 to +150
Tstg
* PW ≤ 10 ms, duty cycle ≤ 50 %
ELECTRICAL CHARACTERISTICS (Ta = 25°C)
Parameter
Collector cutoff current
DC current gain
Symbol
ICBO
Conditions
VCB = −50 V, IE = 0
MIN.
TYP.
MAX.
−100
600
Unit
nA
−
VCE = −5.0 V, IC = −5.0 mA
VCE = −5.0 V, IC = −50 mA
IC = −5.0 mA, IB = −0.25 mA
VCE = −5.0 V, IC = −100 µA
VCE = −0.2 V, IC = −5.0 mA
hFE1 **
hFE2 **
VCE(sat) **
VIL **
VIH **
R1
135
100
190
170
−
DC current gain
−0.07
−0.57
−0.9
10
−0.2
−0.5
Collector saturation voltage
Low level input voltage
High level input voltage
Input resistance
V
V
−2.0
V
kΩ
µs
µs
µs
7.0
13.0
0.2
5.0
6.0
VCC = −5.0 V, RL = 1.0 kΩ
VI = −5.0 V, PW = 2.0 µs
duty cycle≤2 %
Turn-on time
ton
Storage time
tstg
Turn-off time
toff
** Pulse test PW ≤ 350 µs, duty cycle ≤ 2 %
hFE CLASSIFICATION
Marking
hFE1
Q
P
K
135 to 270
200 to 400
300 to 600
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D16166EJV0DS00 (1st edition)
Date Published April 2002 N CP(K)
Printed in Japan
2002
1998
©