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AM45DL6408G70IS PDF预览

AM45DL6408G70IS

更新时间: 2024-01-06 13:55:13
品牌 Logo 应用领域
飞索 - SPANSION 静态存储器内存集成电路
页数 文件大小 规格书
65页 1101K
描述
Memory Circuit, 4MX16, CMOS, PBGA73, 8 X 11.60 MM, FBGA-73

AM45DL6408G70IS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:LFBGA,
针数:73Reach Compliance Code:compliant
HTS代码:8542.32.00.71风险等级:5.12
其他特性:PSEUDO SRAM IS ORGANISED AS 1M X 8 OR 512K X 16; FLASH CAN ALSO BE ORGANISED AS 8M X 8JESD-30 代码:R-PBGA-B73
JESD-609代码:e0长度:11.6 mm
内存密度:67108864 bit内存集成电路类型:MEMORY CIRCUIT
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:73
字数:4194304 words字数代码:4000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:4MX16
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装形状:RECTANGULAR封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):240认证状态:Not Qualified
座面最大高度:1.4 mm最大供电电压 (Vsup):3.3 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:8 mmBase Number Matches:1

AM45DL6408G70IS 数据手册

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P R E L I M I N A R Y  
GENERAL DESCRIPTION  
Am29DL640G Features  
Factory locked parts provide several options. The  
SecSi Sector may store a secure, random 16 byte  
ESN (Electronic Serial Number), customer code (pro-  
grammed through AMD’s ExpressFlash service), or  
both. Customer Lockable parts may utilize the SecSi  
Sector as a one-time programmable area.  
The Am29DL640G is a 64 megabit, 3.0 volt-only flash  
memory device, organized as 4,194,304 words of 16  
bits each or 8,388,608 bytes of 8 bits each. Word  
mode data appears on DQ15–DQ0; byte mode data  
appears on DQ7–DQ0. The device is designed to be  
programmed in-system with the standard 3.0 volt VCC  
supply, and can also be programmed in standard  
EPROM programmers.  
DMS (Data Management Software) allows systems  
to easily take advantage of the advanced architecture  
of the simultaneous read/write product line by allowing  
removal of EEPROM devices. DMS will also allow the  
system software to be simplified, as it will perform all  
functions necessary to modify data in file structures,  
as opposed to single-byte modifications. To write or  
update a particular piece of data (a phone number or  
configuration data, for example), the user only needs  
to state which piece of data is to be updated, and  
where the updated data is located in the system. This  
is an advantage compared to systems where  
user-written software must keep track of the old data  
location, status, logical to physical translation of the  
data onto the Flash memory device (or memory de-  
vices), and more. Using DMS, user-written software  
does not need to interface with the Flash memory di-  
rectly. Instead, the user's software accesses the Flash  
memory by calling one of only six functions. AMD pro-  
vides this software to simplify system design and soft-  
ware integration efforts.  
The device is available with an access time of 70 or 85  
ns and is offered in a 73-ball FBGA package. Standard  
control pins—chip enable (CE#f), write enable (WE#),  
and output enable (OE#)—control normal read and  
write operations, and avoid bus contention issues.  
The device requires only a single 3.0 volt power sup-  
ply for both read and write functions. Internally gener-  
ated and regulated voltages are provided for the  
program and erase operations.  
Simultaneous Read/Write Operations with  
Zero Latency  
The Simultaneous Read/Write architecture provides  
simultaneous operation by dividing the memory  
space into four banks, two 8 Mb banks with small and  
large sectors, and two 24 Mb banks of large sectors  
only. Sector addresses are fixed, system software can  
be used to form user-defined bank groups.  
The device offers complete compatibility with the  
JEDEC single-power-supply Flash command set  
standard. Commands are written to the command  
register using standard microprocessor write timings.  
Reading data out of the device is similar to reading  
from other Flash or EPROM devices.  
During an Erase/Program operation, any of the three  
non-busy banks may be read from. Note that only two  
banks can operate simultaneously. The device can im-  
prove overall system performance by allowing a host  
system to program or erase in one bank, then  
immediately and simultaneously read from the other  
bank, with zero latency. This releases the system from  
waiting for the completion of program or erase  
operations.  
The host system can detect whether a program or  
erase operation is complete by using the device sta-  
tus bits: RY/BY# pin, DQ7 (Data# Polling) and  
DQ6/DQ2 (toggle bits). After a program or erase cycle  
has been completed, the device automatically returns  
to the read mode.  
The Am29DL640G can be organized as both a top  
and bottom boot sector configuration.  
The sector erase architecture allows memory sec-  
tors to be erased and reprogrammed without affecting  
the data contents of other sectors. The device is fully  
erased when shipped from the factory.  
Bank  
Megabits  
Sector Sizes  
Eight 8 Kbyte/4 Kword,  
Fifteen 64 Kbyte/32 Kword  
Bank 1  
8 Mb  
Bank 2  
Bank 3  
24 Mb  
24 Mb  
Forty-eight 64 Kbyte/32 Kword  
Forty-eight 64 Kbyte/32 Kword  
Hardware data protection measures include a low  
VCC detector that automatically inhibits write opera-  
tions during power transitions. The hardware sector  
protection feature disables both program and erase  
operations in any combination of the sectors of mem-  
ory. This can be achieved in-system or via program-  
ming equipment.  
Eight 8 Kbyte/4 Kword,  
Fifteen 64 Kbyte/32 Kword  
Bank 4  
8 Mb  
The SecSi™ (Secured Silicon) Sector is an extra  
256 byte sector capable of being permanently locked  
by AMD or customers. The SecSi Indicator Bit (DQ7)  
is permanently set to a 1 if the part is factory locked,  
and set to a 0 if customer lockable. This way, cus-  
tomer lockable parts can never be used to replace a  
factory locked part.  
The device offers two power-saving features. When  
addresses have been stable for a specified amount of  
time, the device enters the automatic sleep mode.  
The system can also place the device into the  
standby mode. Power consumption is greatly re-  
duced in both modes.  
2
Am45DL6408G  
May 13, 2003  

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