AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
www.ti.com
SPRS717F –OCTOBER 2011–REVISED APRIL 2013
®
Sitara™ AM335x ARM Cortex™-A8 Microprocessors (MPUs)
Check for Samples: AM3359, AM3358
1 Device Summary
1.1 Features
1234567
– 32KB of L1 Data Cache with Single Error-
Detection (parity)
– 256KB of L2 Cache with Error Correcting
Code (ECC)
– 176KB of On-Chip Boot ROM
– 64KB of Dedicated RAM
– Emulation and Debug
• Highlights
– Up to 1-GHz Sitara™ ARM® Cortex™-A8
32‑Bit RISC Microprocessor
•
•
NEON™ SIMD Coprocessor
32KB of L1 Instruction and 32KB Data
Cache with Single-Error Detection (parity)
•
256KB of L2 Cache with Error Correcting
Code (ECC)
•
JTAG
– mDDR(LPDDR), DDR2, DDR3, DDR3L
Support
– Interrupt Controller (up to 128 interrupt
requests)
– General-Purpose Memory Support (NAND,
NOR, SRAM) Supporting Up to 16-bit ECC
– SGX530 3D Graphics Engine
• On-Chip Memory (Shared L3 RAM)
– 64 KB of General-Purpose On-Chip Memory
Controller (OCMC) RAM
– LCD and Touchscreen Controller
– Accessible to all Masters
– Programmable Real-Time Unit and Industrial
Communication Subsystem (PRU-ICSS)
– Supports Retention for Fast Wake-Up
• External Memory Interfaces (EMIF)
– Real-Time Clock (RTC)
– Up to Two USB 2.0 High-Speed OTG Ports
with Integrated PHY
– 10, 100, 1000 Ethernet Switch Supporting Up
to Two Ports
– Serial Interfaces Including:
– mDDR(LPDDR), DDR2, DDR3, DDR3L
Controller:
•
•
•
•
mDDR: 200-MHz Clock (400-MHz Data
Rate)
DDR2: 266-MHz Clock (532-MHz Data
Rate)
DDR3: 400-MHz Clock (800-MHz Data
Rate)
DDR3L: 400-MHz Clock (800-MHz Data
Rate)
•
•
Two Controller Area Network Ports (CAN)
Six UARTs, Two McASPs, Two McSPI,
and Three I2C Ports
– 12-Bit Successive Approximation Register
(SAR) ADC
– Up to Three 32-Bit Enhanced Capture
Modules (eCAP)
– Up to Three Enhanced High-Resolution PWM
Modules (eHRPWM)
•
•
•
16-Bit Data Bus
1 GB of Total Addressable Space
Supports One x16 or Two x8 Memory
Device Configurations
– General-Purpose Memory Controller (GPMC)
– Crypto Hardware Accelerators (AES, SHA,
PKA, RNG)
•
Flexible 8-Bit and 16-Bit Asynchronous
Memory Interface with Up to seven Chip
Selects (NAND, NOR, Muxed-NOR, SRAM)
• MPU Subsystem
•
•
Uses BCH Code to Support 4-Bit, 8-Bit, or
16-Bit ECC
Uses Hamming Code to Support 1-Bit
ECC
– Up to 1-GHz ARM® Cortex™-A8 32-Bit RISC
Microprocessor
– NEON™ SIMD Coprocessor
– Error Locator Module (ELM)
Used in Conjunction with the GPMC to
– 32KB of L1 Instruction Cache with Single-
Error Detection (parity)
•
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Sitara, SmartReflex, DSP/BIOS, XDS are trademarks of Texas Instruments.
Cortex, NEON are trademarks of ARM Ltd or its subsidiaries.
ARM is a registered trademark of ARM Ltd or its subsidiaries.
EtherCAT is a registered trademark of EtherCAT Technology Group.
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POWERVR SGX is a trademark of Imagination Technologies Limited.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to
specifications per the terms of the Texas Instruments standard warranty. Production
processing does not necessarily include testing of all parameters.
Copyright © 2011–2013, Texas Instruments Incorporated
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