PRELIMINARY
Am29DL16xC
16 Megabit (2 M x 8-Bit/1 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
■ Minimum 1 million write cycles guaranteed per sector
■ Simultaneous Read/Write operations
■ 20 Year data retention at 125°C
— Data can be continuously read from one bank while
executing erase/program functions in other bank
— Reliable operation for the life of the system
SOFTWARE FEATURES
— Zero latency between read and write operations
■ Data Management Software (DMS)
■ Multiple bank architectures
— AMD-supplied software manages data programming
and erasing, enabling EEPROM emulation
— Three devices available with different bank sizes (refer
to Table 2)
— Eases sector erase limitations
■ Secured Silicon (SecSi) Sector: Extra 64 KByte sector
■ Supports Common Flash Memory Interface (CFI)
— Factory locked and identifiable: 16 bytes available for
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data
■ Erase Suspend/Erase Resume
— Suspends erase operations to allow programming in
same bank
■ Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
— Customer lockable: Can be read, programmed, or
erased just like other sectors. Once locked, data
cannot be changed
■ Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
■ Zero Power Operation
— Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero
HARDWARE FEATURES
■ Any combination of sectors can be erased
■ Package options
— 48-ball FBGA
— 56-pin SSOP
— 48-pin TSOP
■ Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
cycle completion
■ Hardware reset pin (RESET#)
■ Top or bottom boot block
— Hardware method of resetting the internal state
machine to reading array data
■ Manufactured on 0.32 µm process technology
■ Compatible with JEDEC standards
■ WP#/ACC input pin
— Pinout and software compatible with
single-power-supply flash standard
— Write protect (WP#) function allows protection of two
outermost boot sectors, regardless of sector protect status
— Acceleration (ACC) function accelerates program
timing
PERFORMANCE CHARACTERISTICS
■ High performance
■ Sector protection
— Access time as fast 70 ns
— Hardware method of locking a sector, either
in-system or using programming equipment, to
prevent any program or erase operation within that
sector
— Program time: 7 µs/word typical utilizing Accelerate function
■ Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
— 200 nA in standby or automatic sleep mode
Publication# 21533 Rev: C Amendment/+5
Issue Date: October 18, 1999
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Refer to AMD’s Website (www.amd.com) for the latest information.
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