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AFL12009DW/ES PDF预览

AFL12009DW/ES

更新时间: 2024-02-04 15:51:15
品牌 Logo 应用领域
其他 - ETC 转换器
页数 文件大小 规格书
12页 123K
描述
DC to DC Converter

AFL12009DW/ES 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:MODULE
包装说明:,针数:12
Reach Compliance Code:compliantECCN代码:EAR99
风险等级:5.73模拟集成电路 - 其他类型:DC-DC REGULATED POWER SUPPLY MODULE
最大输入电压:160 V最小输入电压:80 V
标称输入电压:120 VJESD-30 代码:R-XDMA-P12
最大负载调整率:1%功能数量:1
输出次数:1端子数量:12
最高工作温度:125 °C最低工作温度:-55 °C
最大输出电压:10.8 V标称输出电压:9 V
封装主体材料:UNSPECIFIED封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY峰值回流温度(摄氏度):260
认证状态:Not Qualified表面贴装:NO
技术:HYBRID温度等级:MILITARY
端子形式:PIN/PEG端子位置:DUAL
处于峰值回流温度下的最长时间:40最大总功率输出:90 W
微调/可调输出:YESBase Number Matches:1

AFL12009DW/ES 数据手册

 浏览型号AFL12009DW/ES的Datasheet PDF文件第4页浏览型号AFL12009DW/ES的Datasheet PDF文件第5页浏览型号AFL12009DW/ES的Datasheet PDF文件第6页浏览型号AFL12009DW/ES的Datasheet PDF文件第8页浏览型号AFL12009DW/ES的Datasheet PDF文件第9页浏览型号AFL12009DW/ES的Datasheet PDF文件第10页 
AFL12000S Circuit Description  
Figure I. AFL Single Output Block Diagram  
Input  
Filter  
1
4
5
DC Input  
Enable 1  
Output  
Filter  
+Output  
+Sense  
7
Primary  
Bias Supply  
10  
Current  
Sense  
Sync Output  
Share  
Amplifier  
Control  
11 Share  
Error  
Amp  
& Ref  
Sync Input  
Case  
6
3
2
Enable 2  
FB  
12  
Sense  
Amplifier  
9
8
-Sense  
Output Return  
Input Return  
load when their physical separation could cause  
undesirable voltage drop. This connection allows  
regulation to the placard voltage at the point of  
application. When the remote sensing feature is not  
used, the sense leads should be connected to their  
respective output terminals at the converter. Figure  
III. illustrates a typical remotely sensed application.  
Circuit Operation and Application Information  
The AFL series of converters employ a forward  
switched mode converter topology. (refer to Figure  
I.) Operation of the device is initiated when a DC  
voltage whose magnitude is within the specified  
input limits is applied between pins 1 and 2. If pin 4  
is enabled (at a logical 1 or open) the primary bias  
supply will begin generating  
a
regulated  
Inhibiting Converter Output  
housekeeping voltage bringing the circuitry on the  
primary side of the converter to life. A power  
MOSFET is used to chop the DC input voltage into  
a high frequency square wave, applying this  
chopped voltage to the power transformer at the  
nominal converter switching frequency. Maintaining  
a DC voltage within the specified operating range at  
the input assures continuous generation of the  
primary bias voltage.  
As an alternative to application and removal of the  
DC voltage to the input, the user can control the  
converter output by providing TTL compatible,  
positive logic signals to either of two enable pins  
(pin 4 or 12). The distinction between these two  
signal ports is that enable 1 (pin 4) is referenced to  
the input return (pin 2) while enable 2 (pin 12) is  
referenced to the output return (pin 8). Thus, the  
user has access to an inhibit function on either side  
of the isolation barrier. Each port is internally pulled  
"high" so that when not used, an open connection on  
both enable pins permits normal converter  
operation. When their use is desired, a logical "low"  
on either port will shut the converter down.  
The switched voltage impressed on the secondary  
output transformer winding is rectified and filtered to  
generate the converter DC output voltage. An error  
amplifier on the secondary side compares the output  
voltage to a precision reference and generates an  
error signal proportional to the difference. This error  
signal is magnetically coupled through the feedback  
transformer into the controller section of the  
converter varying the pulse width of the square  
wave signal driving the MOSFET, narrowing the  
width if the output voltage is too high and widening it  
if it is too low, thereby regulating the output voltage.  
Figure II. Enable Input Equivalent Circuit  
+5.6V  
100K  
1N4148  
Pin 4 or  
Pin 12  
Disable  
290K  
Remote Sensing  
2N3904  
Connection of the + and - sense leads at a remotely  
located load permits compensation for excessive  
resistance between the converter output and the  
150K  
Pin 2 or  
Pin 8  
7

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