AFBR-5805Z

更新时间： 2024-02-06 21:21:24

品牌	Logo	应用领域
安华高科 - AVAGO		光纤异步传输模式 ATM
页数	文件大小	规格书
14页	223K
描述
ATM Transceivers for SONET OC-3 / SDH STM-1 in Low Cost 1 x 9 Package Style

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技术参数
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AFBR-5805Z 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
Reach Compliance Code：	unknown	风险等级：	5.74
光纤设备类型：	TRANSCEIVER	安装特点：	THROUGH HOLE MOUNT
最高工作温度：	70 °C	最低工作温度：
标称工作波长：	1310 nm	子类别：	Fiber Optic Transceivers
最大供电电压：	5.25 V	表面贴装：	NO
Base Number Matches：	1

AFBR-5805Z 数据手册

Recommended Handling Precautions

Shipping Container

Avago Technologies recommends that normal static pre-

cautions be taken in the handling and assembly of these

transceivers to prevent damage which may be induced

by electrostatic discharge (ESD). The AFBR-5800Z series

of transceivers meet MIL-STD-883C Method 3015.4 Class

2 products.

The transceiver is packaged in a shipping container de-

signed to protect it from mechanical and ESD damage

during shipment or storage.

Board Layout - Decoupling Circuit and Ground Planes

It is important to take care in the layout of your circuit

board to achieve optimum performance from these trans-

ceivers. Figure 7 provides a good example of a schematic

for a power supply decoupling circuit that works well

with these parts. It is further recommended that a con-

tiguous ground plane be provided in the circuit board di-

rectly under the transceiver to provide a low inductance

ground for signal return current. This recommendation is

in keeping with good high frequency board layout prac-

tices.

Care should be used to avoid shorting the receiver data or

signal detect outputs directly to ground without proper

current limiting impedance.

Solder and Wash Process Compatibility

The transceivers are delivered with protective process

plugs inserted into the duplex SC or duplex ST connector

receptacle. This process plug protects the optical subas-

semblies during wave solder and aqueous wash process-

ing and acts as a dust cover during shipping.

These transceivers are compatible with either industry

standard wave or hand solder processes.

NO INTERNAL CONNECTION

AFBR-5805Z

TOP VIEW

V_EE

V_CC

V_EE

V_CC

TERMINATION

AT PHY

DEVICE

INPUTS

V_CC

_CCFILTER

AT V_CCPINS

TRANSCEIVER

TERMINATION

AT TRANSCEIVER

INPUTS

R10

V_CC

NOTES:

THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT

OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT

BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.

R1 = R4 = R6 = R8 = R10 = 130 OHMS FOR +5.0 V OPERATION, 82 OHMS FOR +3.3 V OPERATION.

R2 = R3 = R5 = R7 = R9 = 82 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION.

C1 = C2 = C3 = C5 = C6 = 0.1 µF.

C4 = 10 µF.

L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.

Figure 7. Recommended Decoupling and Termination Circuits

1...4 5 678 9 10...14

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