Data Sheet
ADuM3300/ADuM3301
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operation range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V.
Table 1.
Parameter
Symbol
Min
Typ
Max Unit
Test Conditions
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM3300, Total Supply Current, Four Channels1
DC to 2 Mbps
IDDI (Q)
IDDO (Q)
0.66 0.97 mA
0.39 0.55 mA
VDD1 Supply Current
VDD2 Supply Current
IDD1 (Q)
IDD2 (Q)
2.4
1.1
3.3
2.1
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
10 Mbps (BRW and CRW Grades Only)
VDD1 Supply Current
VDD2 Supply Current
IDD1 (10)
IDD2 (10)
7.0
2.7
8.1
3.6
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
90 Mbps (CRW Grade Only)
VDD1 Supply Current
VDD2 Supply Current
IDD1 (90)
IDD2 (90)
54
15
77
31
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
ADuM3301, Total Supply Current, Four Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
IDD1 (Q)
IDD2 (Q)
2.0
1.6
3.1
2.3
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
10 Mbps (BRW and CRW Grades Only)
VDD1 Supply Current
VDD2 Supply Current
IDD1 (10)
IDD2 (10)
5.5
3.9
6.9
5.4
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
90 Mbps (CRW Grade Only)
VDD1 Supply Current
VDD2 Supply Current
IDD1 (90)
IDD2 (90)
41
28
57
41
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
For All Models
Input Currents
IIA, IIB, IIC,
IID, IE1, IE2
VIH, VEH
VIL, VEL
VOAH, VOBH
VOCH, VODH VDD2) − 0.1
−10
2.0
+0.01 +10 µA
V
0 V ≤ VIA, VIB, VIC, VID ≤ VDD1 or VDD2
0 V ≤ VE1, VE2 ≤ VDD1 or VDD2
,
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
0.8
V
V
,
(VDD1 or
5.0
4.8
0.0
0.04 0.1
0.2
IOx = −20 µA, VIx = VIxH
(VDD1 or
V
IOx = −3.2 mA, VIx = VIxH
V
DD2) − 0.4
Logic Low Output Voltages
VOAL, VOBL
,
0.1
V
V
V
IOx = 20 µA, VIx = VIxL
IOx = 400 µA, VIx = VIxL
IOx = 3.2 mA, VIx = VIxL
V
OCL, VODL
0.4
SWITCHING SPECIFICATIONS
ADuM3300ARWZ/ADuM3301ARWZ
Minimum Pulse Width2
PW
1000 ns
Mbps
100 ns
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
Maximum Data Rate3
1
50
Propagation Delay4
tPHL, tPLH
PWD
tPSK
65
4
Pulse Width Distortion, |tPLH − tPHL
Propagation Delay Skew5
Channel-to-Channel Matching6
|
40
50
50
ns
ns
ns
tPSKCD/OD
Rev. E | Page 3 of 20