Data Sheet
ADuM150N/ADuM151N/ADuM152N
ELECTRICAL CHARACTERISTICS—2.5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 2.5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 2.25 V ≤ VDD1 ≤ 2.75 V, 2.25 V ≤ VDD2 ≤ 2.75 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 5.
Parameter
Symbol Min
Typ
Max
Unit
Test Conditions/Comments
SWITCHING SPECIFICATIONS
Pulse Width
PW
6.6
150
5.0
ns
Mbps
ns
ns
ps/°C
ns
Within PWD limit
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
Data Rate1
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
tPHL, tPLH
PWD
7.0
0.7
1.5
14
5.0
tPSK
6.8
Between any two units at the
same temperature, voltage, load
Channel Matching
Codirectional
Opposing Direction
Jitter
tPSKCD
tPSKOD
0.7
0.7
800
190
5.0
5.0
ns
ns
ps p-p
ps rms
See the Jitter Measurement section
See the Jitter Measurement section
DC SPECIFICATIONS
Input Threshold Voltage
Logic High
Logic Low
Output Voltage
Logic High
VIH
VIL
0.7 × VDDx
VDDx − 0.1
V
V
0.3 × VDDx
3
VOH
VOL
II
VDDx
V
V
V
V
IOx2 = −20 µA, VIx = VIxH
3
VDDx − 0.4 VDDx − 0.2
IOx2 = −2 mA, VIx = VIxH
4
Logic Low
0.0
0.2
+0.01
0.1
0.4
+10
IOx2 = 20 µA, VIx = VIxL
4
IOx2 = 2 mA, VIx = VIxL
Input Current per Channel
Quiescent Supply Current
ADuM150N
−10
µA
0 V ≤ VIx ≤ VDDx
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
2.28
3.13
16.4
3.34
3.44
4.35
27.1
4.67
mA
mA
mA
mA
VI5 = 0 (N0), 1 (N1) 6
VI5 = 0 (N0), 1 (N1)6
VI5 = 1 (N0), 0 (N1)6
VI5 = 1 (N0), 0 (N1)6
ADuM151N
ADuM152N
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
2.52
2.97
13.9
6.83
3.82
3.99
22.7
10.8
mA
mA
mA
mA
VI5 = 0 (N0), 1 (N1)6
VI5 = 0 (N0), 1 (N1)6
VI5 = 1 (N0), 0 (N1)6
VI5 = 1 (N0), 0 (N1)6
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
2.66
2.71
10.8
10.2
3.86
3.91
19.2
16.4
mA
mA
mA
mA
VI5 = 0 (N0), 1 (N1)6
VI5 = 0 (N0), 1 (N1)6
VI5 = 1 (N0), 0 (N1)6
VI5 = 1 (N0), 0 (N1)6
Dynamic Supply Current
Dynamic Input
Dynamic Output
Inputs switching, 50% duty cycle
IDDI (D)
IDDO (D)
0.01
0.01
mA/Mbps
mA/Mbps
Undervoltage Lockout
Positive VDDx Threshold
Negative VDDx Threshold
VDDx Hysteresis
VDDxUV+
VDDxUV−
VDDxUVH
1.6
1.5
0.1
V
V
V
Rev. 0 | Page 7 of 22