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ADuM1400WSRWZ PDF预览

ADuM1400WSRWZ

更新时间: 2024-01-30 20:06:07
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亚德诺 - ADI /
页数 文件大小 规格书
32页 794K
描述
Quad-Channel Digital Isolators

ADuM1400WSRWZ 数据手册

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ADuM1400/ADuM1401/ADuM1402  
Parameter  
Pulse Width Distortion, |tPLH − tPHL  
Symbol  
Min  
Typ Max Unit  
Test Conditions  
5
PWD  
40  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
|
Change vs. Temperature  
Propagation Delay Skew6  
Channel-to-Channel Matching7  
ADuM140xBRW  
11  
ps/°C  
ns  
ns  
tPSK  
tPSKCD/tPSKOD  
50  
50  
Minimum Pulse Width3  
Maximum Data Rate4  
Propagation Delay5  
PW  
100 ns  
Mbps  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
10  
20  
tPHL, tPLH  
PWD  
32  
5
50  
3
5
ns  
Pulse Width Distortion, |tPLH − tPHL  
Change vs. Temperature  
Propagation Delay Skew6  
|
ps/°C  
ns  
tPSK  
15  
3
Channel-to-Channel Matching, Codirectional  
Channels7  
tPSKCD  
ns  
Channel-to-Channel Matching, Opposing-  
Directional Channels7  
tPSKOD  
6
ns  
CL = 15 pF, CMOS signal levels  
ADuM140xCRW  
Minimum Pulse Width3  
Maximum Data Rate4  
Propagation Delay5  
PW  
8.3  
120  
27  
0.5  
3
11.1 ns  
Mbps  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
90  
18  
tPHL, tPLH  
PWD  
32  
2
5
ns  
Pulse Width Distortion, |tPLH − tPHL  
|
Change vs. Temperature  
Propagation Delay Skew6  
ps/°C  
ns  
tPSK  
10  
2
Channel-to-Channel Matching, Codirectional  
Channels7  
tPSKCD  
ns  
Channel-to-Channel Matching, Opposing-  
Directional Channels7  
tPSKOD  
5
ns  
CL = 15 pF, CMOS signal levels  
For All Models  
Output Disable Propagation Delay (High/Low  
to High Impedance)  
Output Enable Propagation Delay (High  
Impedance to High/Low  
Output Rise/Fall Time (10% to 90%)  
Common-Mode Transient Immunity at Logic  
High Output8  
tPHZ, tPLH  
tPZH, tPZL  
6
6
8
8
ns  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
VIx = VDD1 or VDD2, VCM = 1000 V,  
transient magnitude = 800 V  
VIx = 0 V, VCM = 1000 V,  
tR/tF  
|CMH|  
2.5  
35  
ns  
kV/μs  
25  
25  
Common-Mode Transient Immunity at Logic  
Low Output8  
|CML|  
35  
kV/μs  
transient magnitude = 800 V  
Refresh Rate  
fr  
1.2  
Mbps  
Input Dynamic Supply Current per Channel9  
Output Dynamic Supply Current per Channel9  
IDDI (D)  
IDDO (D)  
0.19  
0.05  
mA/Mbps  
mA/Mbps  
1 All voltages are relative to their respective ground.  
2 The supply current values for all four channels are combined when running at identical data rates. Output supply current values are specified with no output load  
present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section.  
See Figure 8 through Figure 10 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through  
Figure 15 for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1400/ADuM1401/ADuM1402 channel configurations.  
3 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.  
4 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.  
5 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is  
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.  
6 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load  
within the recommended operating conditions.  
7 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of  
the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with  
inputs on opposing sides of the isolation barrier.  
8 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate  
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient  
magnitude is the range over which the common mode is slewed.  
9 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information  
on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating the per-channel supply current  
for a given data rate.  
Rev. G | Page 5 of 32  

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