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ADUM1301BRWZN PDF预览

ADUM1301BRWZN

更新时间: 2022-12-01 21:32:23
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管
页数 文件大小 规格书
32页 541K
描述
Interface Circuit, CMOS, PDSO16

ADUM1301BRWZN 数据手册

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Data Sheet  
ADuM1300/ADuM1301  
Parameter  
Symbol  
Min  
Typ  
Max Unit  
Test Conditions  
ADuM1300BRW/ADuM1301BRW  
Minimum Pulse Width2  
Maximum Data Rate3  
PW  
100 ns  
CL = 15 pF, CMOS signal levels  
10  
20  
Mbps  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
Propagation Delay4  
tPHL, tPLH  
PWD  
32  
5
50  
3
4
ns  
Pulse Width Distortion, |tPLH − tPHL  
Change vs. Temperature  
Propagation Delay Skew5  
|
ps/°C  
ns  
tPSK  
15  
3
Channel-to-Channel Matching, Codirectional  
Channels6  
tPSKCD  
ns  
Channel-to-Channel Matching, Opposing-  
Directional Channels6  
tPSKOD  
6
ns  
CL = 15 pF, CMOS signal levels  
ADuM1300CRW/ADuM1301CRW  
Minimum Pulse Width2  
Maximum Data Rate3  
PW  
8.3  
120  
27  
0.5  
3
11.1 ns  
Mbps  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
90  
18  
Propagation Delay4  
tPHL, tPLH  
PWD  
32  
2
4
ns  
Pulse Width Distortion, |tPLH − tPHL  
|
Change vs. Temperature  
Propagation Delay Skew5  
ps/°C  
ns  
tPSK  
10  
2
Channel-to-Channel Matching, Codirectional  
Channels6  
tPSKCD  
ns  
Channel-to-Channel Matching, Opposing-  
Directional Channels6  
tPSKOD  
5
ns  
CL = 15 pF, CMOS signal levels  
For All Models  
Output Disable Propagation Delay (High/Low  
to High Impedance)  
Output Enable Propagation Delay (High  
Impedance to High/Low)  
Output Rise/Fall Time (10% to 90%)  
Common-Mode Transient Immunity at Logic  
High Output7  
tPHZ, tPLH  
tPZH, tPZL  
6
6
8
8
ns  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
VIx = VDD1 or VDD2, VCM = 1000 V,  
transient magnitude = 800 V  
VIx = 0 V, VCM = 1000 V,  
tR/tF  
|CMH|  
2.5  
35  
ns  
kV/µs  
25  
25  
Common-Mode Transient Immunity at Logic  
Low Output7  
|CML|  
35  
kV/µs  
transient magnitude = 800 V  
Refresh Rate  
fr  
1.2  
Mbps  
Input Dynamic Supply Current per Channel8  
Output Dynamic Supply Current per Channel8  
IDDI (D)  
IDDO (D)  
0.19  
0.05  
mA/Mbps  
mA/Mbps  
1 The supply current values are for all three channels combined when running at identical data rates. Output supply current values are specified with no output load  
present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section.  
See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through  
Figure 12 for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1300/ADuM1301 channel configurations.  
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.  
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.  
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is  
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.  
5 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load  
within the recommended operating conditions.  
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of  
the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with  
inputs on opposing sides of the isolation barrier.  
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate  
that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient  
magnitude is the range over which the common mode is slewed.  
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 6 through Figure 8 for information  
on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating the per-channel supply current  
for a given data rate.  
Rev. K | Page 5 of 32  

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