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ADuC7023BCPZ62I-RL PDF预览

ADuC7023BCPZ62I-RL

更新时间: 2024-02-06 00:02:56
品牌 Logo 应用领域
亚德诺 - ADI 微控制器
页数 文件大小 规格书
96页 1473K
描述
Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU with Enhanced IRQ Handler

ADuC7023BCPZ62I-RL 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.25
具有ADC:YES地址总线宽度:
位大小:32CPU系列:ARM7
最大时钟频率:44 MHzDAC 通道:YES
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm湿度敏感等级:1
I/O 线路数量:12端子数量:32
最高工作温度:125 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC32,.2SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:3/3.3 V
认证状态:Not QualifiedRAM(字节):8192
ROM(单词):63488ROM可编程性:FLASH
座面最大高度:0.8 mm速度:41.78 MHz
子类别:Microcontrollers最大压摆率:35 mA
最大供电电压:3.6 V最小供电电压:2.7 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:5 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

ADuC7023BCPZ62I-RL 数据手册

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Data Sheet  
ADuC7023  
SPECIFICATIONS  
AVDD = IOVDD = 2.7 V to 3.6 V, VREF = 2.5 V internal reference, fCORE = 41.78 MHz, TA = −40°C to +125°C, unless otherwise noted.  
Table 1.  
Parameter  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
ADC CHANNEL SPECIFICATIONS  
ADC Power-Up Time  
DC Accuracy1, 2  
Eight acquisition clocks and fADC/2  
5
μs  
Resolution  
Integral Nonlinearity  
12  
Bits  
LSB  
LSB  
LSB  
LSB  
LSB  
0.6  
1.5  
2.5 V internal reference  
1.0 V external reference  
2.5 V internal reference  
1.0 V external reference  
ADC input is a dc voltage  
1.0  
0.5  
+0.7/−0.6  
1
Differential Nonlinearity3, 4  
+1/−0.9  
DC Code Distribution  
ENDPOINT ERRORS5  
Offset Error  
Offset Error Match  
Gain Error  
1
1
2
1
2
LSB  
LSB  
LSB  
LSB  
Gain Error Match  
DYNAMIC PERFORMANCE  
Signal-to-Noise Ratio (SNR)  
Total Harmonic Distortion (THD)  
Peak Harmonic or Spurious Noise  
Channel-to-Channel Crosstalk  
ANALOG INPUT  
fIN = 10 kHz sine wave, fSAMPLE = 1 MSPS  
69  
dB  
dB  
dB  
dB  
Includes distortion and noise components  
−78  
−75  
−80  
Measured on adjacent channels  
Input Voltage Ranges  
Differential Mode  
Single-Ended Mode  
Leakage Current  
VCM VREF/26  
0 to VREF  
6
V
V
µA  
pF  
1
20  
Input Capacitance  
During ADC acquisition  
ON-CHIP VOLTAGE REFERENCE  
Output Voltage  
0.47 µF from VREF to AGND  
2.5  
V
Accuracy  
4
mV  
ppm/°C  
dB  
ms  
TA = 25°C  
TA = 25°C  
Reference Temperature Coefficient  
Power Supply Rejection Ratio  
Output Impedance  
Internal VREF Power-On Time  
EXTERNAL REFERENCE INPUT  
Input Voltage Range  
DAC CHANNEL SPECIFICATIONS  
DC Accuracy7  
15  
75  
51  
1
0.625  
AVDD  
V
RL = 5 kΩ, CL = 100 pF  
Resolution  
Relative Accuracy  
Differential Nonlinearity  
Offset Error  
Gain Error8  
12  
2
Bits  
LSB  
LSB  
mV  
%
1
15  
1
Guaranteed monotonic  
2.5 V internal reference  
Gain Error Mismatch  
DC Accuracy9  
0.1  
%
% of full scale on DAC0  
RL = 1 kΩ, CL = 100 pF  
Resolution  
Relative Accuracy  
Differential Nonlinearity  
Offset Error  
Gain Error10  
12  
2.5  
1
15  
1
Bits  
LSB  
LSB  
mV  
%
Guaranteed monotonic  
2.5 V internal reference  
Gain Error Mismatch  
ANALOG OUTPUTS  
Output Voltage Range 1  
Output Voltage Range 2  
Output Impedance  
0.1  
%
% of full scale on DAC0  
VREF range: AGND to AVDD  
0 to 2.5  
0 to AVDD  
2
V
V
Rev. E | Page 5 of 96  
 
 

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