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ADP2102YCPZ-1-R7 PDF预览

ADP2102YCPZ-1-R7

更新时间: 2024-01-13 05:45:53
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 开关控制器开关式稳压器开关式控制器电源电路开关式稳压器或控制器
页数 文件大小 规格书
25页 1733K
描述
SWITCHING REGULATOR, 3000 kHz SWITCHING FREQ-MAX, QCC16, 3 X 3 MM, ROHS COMPLIANT, LFCSP-16

ADP2102YCPZ-1-R7 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:16
Reach Compliance Code:unknown风险等级:5.6
模拟集成电路 - 其他类型:SWITCHING REGULATOR控制模式:CURRENT-MODE
最大输入电压:5.5 V最小输入电压:2.7 V
标称输入电压:3.6 VJESD-30 代码:S-XQCC-N16
JESD-609代码:e3长度:3 mm
湿度敏感等级:3功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
座面最大高度:0.9 mm表面贴装:YES
切换器配置:BUCK最大切换频率:3000 kHz
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmBase Number Matches:1

ADP2102YCPZ-1-R7 数据手册

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ADP2102  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
MODE  
1
2
3
4
8
7
6
5
AVIN  
PVIN  
LX  
EN  
ADP2102  
TOP VIEW  
(Not to Scale)  
FB/OUT  
AGND  
PGND  
Figure 3. Pin Configuration  
Table 4. Pin Function Descriptions  
Pin  
No.  
Mnemonic Description  
1
MODE  
Mode Input. To set the ADP2102 to forced continuous conduction mode (CCM), drive MODE high. To set the ADP2102  
to power save mode/auto mode (PSM), drive MODE low.  
2
3
EN  
Enable Input. Drive EN high to turn on the ADP2102. Drive EN low to turn it off and reduce the input current to 0.1 μA.  
This pin cannot be left floating.  
Output Sense Input or Feedback Input. For fixed output versions, OUT is the top of the internal resistive voltage  
divider. Connect OUT to the output voltage. For adjustable (no suffix) versions, FB is the input to the error amplifier.  
Drive FB through a resistive voltage divider to set the output voltage. The FB regulation threshold is 0.8 V.  
FB/OUT  
4
AGND  
Analog Ground. Connect AGND to PGND at a single point as close to the ADP2102 as possible. The exposed paddle is  
electrically common with the analog ground pin.  
5
6
PGND  
LX  
Power Ground.  
Switch Output. LX is the drain of the P-channel MOSFET switch and the N-channel synchronous rectifier. Connect the  
output LC filter between LX and the output voltage.  
7
8
PVIN  
AVIN  
Power Source Input. Drive PVIN with a 2.7 V to 5.5 V power source. A ceramic bypass capacitor of 2.2 μF or greater is  
required on this pin to the nearest PGND plane.  
Power Source Input. AVIN is the supply for the ADP2102 internal circuitry. This pin can be connected in three different ways.  
For noise reduction, place an external RC filter between PVIN and AVIN. The recommended values for the  
external RC filter are 10 Ω and 0.1 μF, respectively. This configuration can be used for all loads.  
For light-to-medium loads up to 300 mA, the AVIN pin and the PVIN pin can be shorted together.  
For light-to-heavy loads (greater than 300 mA), bypass the AVIN pin with a 1 pF to 0.01 μF capacitor to the  
nearest PGND plane. Do not short the AVIN and PVIN pins when using only a bypass capacitor.  
Rev. B | Page 5 of 24  
 

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