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ADP151ACBZ-2.5-R7 PDF预览

ADP151ACBZ-2.5-R7

更新时间： 2024-01-17 11:06:49
品牌 Logo 应用领域
亚德诺 - ADI 线性稳压器IC调节器电源电路输出元件PC
页数 文件大小 规格书
24页 526K
描述
Ultralow Noise,200 mA, CMOS Linear Regulator

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ADP151ACBZ-2.5-R7 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：BGA
包装说明：WLCSP-4针数：4
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：1.61
Samacsys Confidence：Samacsys Status：Released
Schematic Symbol：https://componentsearchengine.com/symbol.php?partID=523587PCB Footprint：https://componentsearchengine.com/footprint.php?partID=523587
Samacsys PartID：523587Samacsys Image：https://componentsearchengine.com/Images/9/ADP151ACBZ-2.5-R7.jpg
Samacsys Thumbnail Image：https://componentsearchengine.com/Thumbnails/1/ADP151ACBZ-2.5-R7.jpgSamacsys Pin Count：4
Samacsys Part Category：Integrated CircuitSamacsys Package Category：Other
Samacsys Footprint Name：BGA4C40P2X2_76X76X66Samacsys Released Date：2017-01-11 11:21:59
Is Samacsys：N可调性：FIXED
最大回动电压 1：0.2 V标称回动电压 1：0.135 V
最大绝对输入电压：6.5 V最大输入电压：5.5 V
最小输入电压：2.9 VJESD-30 代码：S-PBGA-B4
JESD-609代码：e3长度：0.76 mm
最大电网调整率：0.0041%最大负载调整率：0.03%
湿度敏感等级：1功能数量：1
输出次数：1端子数量：4
工作温度TJ-Max：125 °C工作温度TJ-Min：-40 °C
最大输出电流 1：0.2 A最大输出电压 1：2.5375 V
最小输出电压 1：2.45 V标称输出电压 1：2.5 V
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA4,2X2,16封装形状：SQUARE
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH包装方法：TR, 7 INCH
峰值回流温度（摄氏度）：260认证状态：Not Qualified
调节器类型：FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR座面最大高度：0.66 mm
表面贴装：YES技术：CMOS
端子面层：Matte Tin (Sn)端子形式：BALL
端子节距：0.4 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：30最大电压容差：2%
宽度：0.76 mmBase Number Matches：1

ADP151ACBZ-2.5-R7 数据手册

 浏览型号ADP151ACBZ-2.5-R7的Datasheet PDF文件第2页浏览型号ADP151ACBZ-2.5-R7的Datasheet PDF文件第3页浏览型号ADP151ACBZ-2.5-R7的Datasheet PDF文件第4页浏览型号ADP151ACBZ-2.5-R7的Datasheet PDF文件第6页浏览型号ADP151ACBZ-2.5-R7的Datasheet PDF文件第7页浏览型号ADP151ACBZ-2.5-R7的Datasheet PDF文件第8页 
ADP151  
ABSOLUTE MAXIMUM RATINGS  
Table 2.  
specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit  
board. See JESD51-7 and JESD51-9 for detailed information  
on the board construction. For additional information, see the  
AN-617 Application Note, MicroCSP™ Wafer Level Chip Scale  
Package, available at www.analog.com.  
Parameter  
Rating  
VIN to GND  
VOUT to GND  
−0.3 V to +6.5 V  
−0.3 V to VIN  
EN to GND  
−0.3 V to +6.5V  
−65°C to +150°C  
−40°C to +125°C  
−40°C to +125°C  
JEDEC J-STD-020  
ΨJB is the junction-to-board thermal characterization parameter  
with units of °C/W. ΨJB of the package is based on modeling and  
calculation using a 4-layer board. The JESD51-12, Guidelines for  
Reporting and Using Electronic Package Thermal Information,  
states that thermal characterization parameters are not the same  
as thermal resistances. ΨJB measures the component power  
flowing through multiple thermal paths rather than a single  
path as in thermal resistance, θJB. Therefore, ΨJB thermal paths  
include convection from the top of the package as well as  
radiation from the package, factors that make ΨJB more useful  
in real-world applications. Maximum junction temperature (TJ)  
is calculated from the board temperature (TB) and power  
dissipation (PD) using the formula  
Storage Temperature Range  
Operating Junction Temperature Range  
Operating Ambient Temperature Range  
Soldering Conditions  
Stresses above those listed under absolute maximum ratings  
may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device at these or  
any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
THERMAL DATA  
TJ = TB + (PD × ΨJB)  
Absolute maximum ratings apply individually only, not in  
combination. The ADP151 can be damaged when the junction  
temperature limits are exceeded. Monitoring ambient temperature  
does not guarantee that TJ is within the specified temperature  
limits. In applications with high power dissipation and poor  
thermal resistance, the maximum ambient temperature may  
have to be derated.  
See JESD51-8 and JESD51-12 for more detailed information  
about ΨJB.  
THERMAL RESISTANCE  
θJA and ΨJB are specified for the worst-case conditions, that is, a  
device soldered in a circuit board for surface-mount packages.  
In applications with moderate power dissipation and low PCB  
thermal resistance, the maximum ambient temperature can  
exceed the maximum limit as long as the junction temperature  
is within specification limits. The junction temperature (TJ) of  
the device is dependent on the ambient temperature (TA), the  
power dissipation of the device (PD), and the junction-to-ambient  
thermal resistance of the package (θJA).  
Table 3. Thermal Resistance  
Package Type  
θJA  
ΨJB  
43  
Unit  
°C/W  
°C/W  
5-Lead TSOT  
170  
260  
4-Ball, 0.4 mm Pitch WLCSP  
58  
ESD CAUTION  
Maximum junction temperature (TJ) is calculated from the  
ambient temperature (TA) and power dissipation (PD) using the  
formula  
TJ = TA + (PD × θJA)  
Junction-to-ambient thermal resistance (θJA) of the package is  
based on modeling and calculation using a 4-layer board. The  
junction-to-ambient thermal resistance is highly dependent on  
the application and board layout. In applications where high  
maximum power dissipation exists, close attention to thermal  
board design is required. The value of θ may vary, depending on  
JA  
PCB material, layout, and environmental conditions. The  
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