Datasheet > ADP124ARHZ-2.5-R7

ADP124ARHZ-2.5-R7

更新时间： 2024-01-06 04:11:50

品牌	Logo	应用领域
亚德诺 - ADI		稳压器
页数	文件大小	规格书
20页	678K
描述
5.5 V Input, 500 mA, Low Quiescent Current, CMOS Linear Regulators

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ADP124/ADP125

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

VOUT

VIN

VOUT

ADJ

VIN

ADP124

ADP125

TOP VIEW

VOUT SENSE

GND

(Not to Scale)

GND

NC = NO CONNECT

Figure 3. ADP124 Fixed Output Pin Configuration

Figure 4. ADP125 Adjustable Output Pin Configuration

Table 5. Pin Function Descriptions

Mnemonic

ADP125

Pin No. ADP124

Description

VOUT

VOUT SENSE N/A

VOUT

Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.

Feedback Node for the Error Amplifier. Connect to VOUT.

N/A

ADJ

Feedback Node for the Error Amplifier. Connect the midpoint of an external divider from

VOUT to GND to this pin to set the output voltage.

GND

Ground.

Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator.

For automatic startup, connect EN to VIN.

VIN

No Connect. This pin is not connected internally.

Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.

The exposed pad must be connected to ground.

Rev. 0 | Page 6 of 20

1...3 4 567 8 9...20

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