Datasheet > 电源电路 > 线性稳压器IC> ADP124ACPZ-3.3-R7

ADP124ACPZ-3.3-R7

更新时间： 2024-02-18 18:39:20

品牌	Logo	应用领域
亚德诺 - ADI		线性稳压器IC 调节器电源电路光电二极管输出元件
页数	文件大小	规格书
20页	632K
描述
5.5 V Input, 500 mA, Low Quiescent Current, CMOS Linear Regulators

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ADP124ACPZ-3.3-R7 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	HVSON, SOLCC8,.08,20	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	1.61
Is Samacsys：	N	可调性：	FIXED
最大回动电压 1：	0.23 V	标称回动电压 1：	0.13 V
最大绝对输入电压：	6.5 V	最大输入电压：	5.5 V
最小输入电压：	2.3 V	JESD-30 代码：	S-PDSO-N8
JESD-609代码：	e4	长度：	2 mm
湿度敏感等级：	1	功能数量：	1
输出次数：	1	端子数量：	8
工作温度TJ-Max：	125 °C	工作温度TJ-Min：	-40 °C
最大输出电流 1：	0.5 A	最大输出电压 1：	3.3495 V
最小输出电压 1：	3.234 V	标称输出电压 1：	3.3 V
封装主体材料：	PLASTIC/EPOXY	封装代码：	HVSON
封装等效代码：	SOLCC8,.08,20	封装形状：	SQUARE
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE	包装方法：	TAPE AND REEL
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
调节器类型：	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR	座面最大高度：	0.65 mm
子类别：	Other Regulators	表面贴装：	YES
技术：	CMOS	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
最大电压容差：	1.5%	宽度：	2 mm
Base Number Matches：	1

ADP124ACPZ-3.3-R7 数据手册

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Data Sheet

ADP124/ADP125

ABSOLUTE MAXIMUM RATINGS

application and board layout. In applications in which high maxi-

mum power dissipation exists, close attention to thermal board

design is required. The value of θ_JAmay vary, depending on PCB

material, layout, and environmental conditions. The specified

values of θ_JAare based on a 4-layer, 4 inch × 3 inch circuit board.

Refer to JESD 51-7 for detailed information on the board

construction.

Table 3.

Parameter

Rating

VIN to GND

ADJ to GND

EN to GND

VOUT to GND

−0.3 V to +6.5 V

−0.3 V to VIN

Storage Temperature Range

Operating Ambient Temperature Range

Operating Junction Temperature Range

Soldering Conditions

−65°C to +150°C

−40°C to +85°C

−40°C to +125°C

JEDEC J-STD-020

Ψ_JBis the junction-to-board thermal characterization parameter

and is measured in °C /W. The Ψ_JBof the package is based on

modeling and calculation using a 4-layer board. The Guidelines for

Reporting and Using Package Thermal Information: JESD51-12

states that thermal characterization parameters are not the same

as thermal resistances. Ψ_JBmeasures the component power flowing

through multiple thermal paths rather than a single path as in

thermal resistance, θ_JB. Therefore, Ψ_JBthermal paths include

convection from the top of the package as well as radiation from

the package—factors that make Ψ_JBmore useful in real-world

applications. Maximum junction temperature (T_J) is calculated

from the board temperature (T_B) and power dissipation (P_D)

using the formula

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in

combination. The ADP124/ADP125 can be damaged when the

junction temperature limits are exceeded. Monitoring ambient

temperature does not guarantee that T_Jwill remain within the

specified temperature limits. In applications with high power

dissipation and poor thermal resistance, the maximum ambient

temperature may have to be limited.

T_J= T_B+ (P_D× Ψ_JB)

Refer to JESD51-8 and JESD51-12 for more detailed information

about Ψ_JB.

THERMAL RESISTANCE

θ_JAand Ψ_JBare specified for the worst-case conditions, that is, a

device soldered in a circuit board for surface-mount packages.

In applications with moderate power dissipation and low PCB

thermal resistance, the maximum ambient temperature can

exceed the maximum limit as long as the junction temperature

is within specification limits. The junction temperature (T_J) of

the device is dependent on the ambient temperature (T_A), the

power dissipation of the device (P_D), and the junction-to-ambient

thermal resistance of the package (θ_JA).

Table 4. Thermal Resistance

Package Type

8-Lead MSOP

8-Lead LFCSP

θ_JA

Ψ_JB

Unit

°C/W

102.8

68.9

31.8

44.1

ESD CAUTION

Maximum junction temperature (T_J) is calculated from the

ambient temperature (T_A) and power dissipation (P_D) using the

formula

T_J= T_A+ (P_D× θ_JA)

The junction-to-ambient thermal resistance (θ_JA) of the package

is based on modeling and calculation using a 4-layer board. The

junction-to-ambient thermal resistance is highly dependent on the

Rev. C | Page 5 of 20

1 2 3 456 7 8...20

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