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ADP121CB-1.8-EVALZ PDF预览

ADP121CB-1.8-EVALZ

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
亚德诺 - ADI 稳压器
页数 文件大小 规格书
20页 593K
描述
150 mA, Low Quiescent Current, CMOS Linear Regulator

ADP121CB-1.8-EVALZ 数据手册

 浏览型号ADP121CB-1.8-EVALZ的Datasheet PDF文件第1页浏览型号ADP121CB-1.8-EVALZ的Datasheet PDF文件第2页浏览型号ADP121CB-1.8-EVALZ的Datasheet PDF文件第3页浏览型号ADP121CB-1.8-EVALZ的Datasheet PDF文件第5页浏览型号ADP121CB-1.8-EVALZ的Datasheet PDF文件第6页浏览型号ADP121CB-1.8-EVALZ的Datasheet PDF文件第7页 
ADP121  
Parameter  
Symbol  
Conditions  
Min  
Typ  
60  
66  
Max  
Unit  
dB  
dB  
POWER SUPPLY REJECTION RATIO  
PSRR  
10 kHz, VIN = 5 V, VOUT = 3.3 V  
10 kHz, VIN = 5 V, VOUT = 2.5 V  
10 kHz, VIN = 5 V, VOUT = 1.2 V  
70  
dB  
INPUT AND OUTPUT CAPACITOR5  
Minimum Input and Output Capacitance  
Capacitor ESR  
CAPMIN  
RESR  
TJ = −40°C to +125°C  
TJ = −40°C to +125°C  
0.70  
0.001  
μF  
Ω
1
1 Based on an end-point calculation using 1 mA and 100 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.  
2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output  
voltages above 2.3 V.  
3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.  
4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V  
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.  
5 The minimum input and output capacitance should be greater than 0.70 ꢀF over the full range of operating conditions. The full range of operating conditions in the  
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;  
Y5V and Z5U capacitors are not recommended for use with any LDO.  
Rev. 0 | Page 4 of 20  

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