Datasheet > ADN2882ACHIPS

ADN2882ACHIPS

更新时间： 2024-01-28 12:58:04

品牌	Logo	应用领域
亚德诺 - ADI		电信电信集成电路
页数	文件大小	规格书
12页	195K
描述
4.25 Gbps 3.3 V Low Noise Transimpedance Amplifier

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ADN2882ACHIPS 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	DIE
包装说明：	DIE, DIE OR CHIP	针数：	0
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.7
JESD-30 代码：	R-XUUC-N17	功能数量：	1
端子数量：	17	最高工作温度：	95 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	DIE	封装等效代码：	DIE OR CHIP
封装形状：	RECTANGULAR	封装形式：	UNCASED CHIP
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3.3 V
认证状态：	Not Qualified	子类别：	Other Telecom ICs
标称供电电压：	3.3 V	表面贴装：	YES
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子位置：	UPPER
处于峰值回流温度下的最长时间：	NOT SPECIFIED	Base Number Matches：	1

ADN2882ACHIPS 数据手册

4.25 Gbps, 3.3 V Low Noise,

Transimpedance Amplifier

ADN2882

FEATURES

GENERAL DESCRIPTION

Bandwidth: 3.5 GHz

The ADN2882 is a 3.3 V high gain SiGe transimpedance

amplifier (TIA) which converts the small signal current of a

photo detector to a large differential voltage output. The

ADN2882 features a typical 475 nA input-referred noise,

enabling an optical sensitivity of −22 dBm (0.85 A/W PIN).

With a bandwidth of 3.5 GHz, the ADN2882 allows a data rate

operation up to 4.25 Gbps. Typical power dissipation is 80 mW.

Input noise current density: 8 pA/√Hz

Optical sensitivity

−22.0 dBm¹

−20.4 dBm²

Differential transimpedance: 3700 V/A

Power dissipation: 80 mW

Differential output swing: 260 mV p-p

Input overload current: 5.6 mA p-p

On-chip RSSI function

Low frequency cutoff: 12 kHz

On-chip PD filter: R_F= 200 Ω, C_F= 20 pF

Die size: 0.7 mm × 1.2 mm

To facilitate the assembly in small form factor packages, such as

TO-46 headers, the ADN2882 provides an on-chip RC filter

(200 Ω, 20 pF) and features a 12 kHz low frequency cutoff

without using an external capacitor. An on-chip RSSI circuit,

which generates a voltage proportional to the average photo-

diode current, is available for power monitoring and assembly

alignment.

APPLICATIONS

4.25 Gbps optical receivers

GbE/FC optical receivers

SFF-8472-compliant receivers

PIN/APD-TIA receiver optical subassemblies

The ADN2882 is available in die form. With a chip area of

1.2 mm × 0.7 mm, the TIA layout is optimized for TO-Can-

based packages.

¹Based on 1550 nm PIN, C_D= 0.5 0.10 pF, responsivity = 0.85 A/W,

ER = 9 dB, PRBS 2³¹− 1 at 4.25 Gbps, BER < 10⁻¹²

²Calculated result based on an 850 nm PIN, C_D= 0.5 0.15 pF,

responsivity = 0.48 A/W, ER = 9 dB, at 4.25 Gbps, BER < 10⁻¹²

FUNCTIONAL BLOCK DIAGRAM

3.3V

VCCFILTER

VCC

200Ω

50Ω

1100Ω

FILTER

OUT

OUTB

20pF

0.85V

5mA

RSSI

GND

CAP

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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