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ADM8830ACPZ-REEL7 PDF预览

ADM8830ACPZ-REEL7

更新时间： 2024-02-02 12:48:58
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
8页 860K
描述
Please see the ADM8832.

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ADM8830ACPZ-REEL7 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN,针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.7
模拟集成电路 - 其他类型：SWITCHED CAPACITOR REGULATOR最大输入电压：3.6 V
最小输入电压：2.6 V标称输入电压：3 V
JESD-30 代码：S-XQCC-N20JESD-609代码：e3
长度：4 mm湿度敏感等级：3
功能数量：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1 mm表面贴装：YES
切换器配置：TRIPLER最大切换频率：140 kHz
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：4 mm
Base Number Matches：1

ADM8830ACPZ-REEL7 数据手册

 浏览型号ADM8830ACPZ-REEL7的Datasheet PDF文件第2页浏览型号ADM8830ACPZ-REEL7的Datasheet PDF文件第3页浏览型号ADM8830ACPZ-REEL7的Datasheet PDF文件第4页浏览型号ADM8830ACPZ-REEL7的Datasheet PDF文件第5页浏览型号ADM8830ACPZ-REEL7的Datasheet PDF文件第6页浏览型号ADM8830ACPZ-REEL7的Datasheet PDF文件第8页 
ADM8830  
SCANNING AND BLANKING  
V
ATFT LCD panel is essentially made up of a bank of capacitors,  
each representing a pixel in the display.These capacitors store  
different levels of charge, depending on the amount of lumines-  
cence required for a given pixel.When a picture is being displayed  
on the panel, a scan of all the pixel capacitors is performed, placing  
different levels of charge on each in order to create the image.The  
process of updating the display like this is called “scanning.” Once  
scanned, an image will be held by pixel capacitance and the con-  
troller and source line drivers can be put into a low power mode.  
This low power mode is referred to as the blanking mode on the  
ADM8830. Over a finite period of time, this pixel charge will leak  
and the capacitors will have to be refreshed in order to maintain  
the image.  
CC  
SHDN  
tR5V  
90%  
10%  
tF5V  
+5V  
tR15V  
tF15V  
+15V  
–10V  
tDELAY  
–3V  
90%  
10%  
tR10V  
tF10V  
LOAD  
The ADM8830 caters to the two modes of operation described  
above as follows.When theTFT LCD panel is in scanning mode,  
a logic high on the SCAN/BLANK input places the device in high  
current power mode, providing extra power (extra current) to the  
LCD controller and the source line drivers. If the panel continues  
to be updated (as when a moving picture is being displayed), then  
the ADM8830 can be continually operated in scanning mode. If  
the same image is kept on the panel, a logic low is applied to the  
SCAN/BLANK input and the ADM8830 enters blanking (low  
current) mode. Depending on how often the image is being updated,  
the ADM8830 can be operated with a variable SCAN/BLANK  
duty cycle.This helps to maximize power efficiency and therefore  
extends the battery life.  
SCAN/BLANK  
EXTERNAL CLOCK  
Figure 2. Power Sequence  
TRANSIENT RESPONSE  
The ADM8830 features extremely fast transient response, making  
it very suitable for fast image updates onTFT LCD panels.This  
means that even under changing load conditions there is still very  
effective regulation of the 5V output.TPCs 10 and 11 show how  
the 5.1V output responds when a maximum load is dynamically  
connected and disconnected. Note that the output settles within  
5 µs to less than 1% of the output level.  
90%  
10%  
EXTERNAL CLOCK  
The ADM8830 has an internal 100 kHz oscillator, but an external  
clock source can also be used to clock the part.This clock source  
must be applied to the CLKIN pin. Power is saved during blank-  
ing periods by disabling the internal oscillator and switching to  
the lower frequency external clock source.To achieve optimum  
performance of the charge pump circuitry, it is important that the  
duty cycle of the external clock source be 50% and that the rise  
and fall times be less than 20 ns.  
tR  
tF  
tR: RISETIME  
tF: FALLTIME  
tH  
tH  
tT  
@ 100% = DUTY CYCLE  
tT  
Figure 1. Duty Cycle of External Clock  
0.28  
0.4  
3.10  
0.75  
POWER SEQUENCING  
0.9  
The gate drive supplies must be sequenced such that the –10V  
supply is up before the +15V supply for theTFT panel to power  
up correctly.The ADM8830 controls this sequence.When the  
device is turned on (a logic high on SHDN), the ADM8830 allows  
the –10V output to ramp immediately but holds off the +15V  
output. It continues to do this until the negative output has reached  
–3V. At this point, the positive output is enabled and allowed to  
ramp up to +15V.This sequence is highlighted in Figure 2.  
0.25  
0.5  
1.95  
2.10  
SOLDER MASK  
BOARD METALLIZATION  
0.25  
0.2  
DIMENSIONS IN  
MILLIMETERS  
Figure 3. Suggested LFCSP 4 mm 4 mm 20-Lead  
Land Pattern  
REV. B  
–7–  
1...45678

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