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ADM7170ACPZ-1.8-R7 PDF预览

ADM7170ACPZ-1.8-R7

更新时间: 2024-01-20 09:45:18
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管输出元件调节器
页数 文件大小 规格书
24页 960K
描述
6.5 V, 500 mA, Ultralow Noise, High PSRR, Fast Transient Response CMOS LDO

ADM7170ACPZ-1.8-R7 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Active包装说明:HVSON,
针数:8Reach Compliance Code:compliant
风险等级:1.65Is Samacsys:N
最大输入电压:6.5 V最小输入电压:2.3 V
JESD-30 代码:S-PDSO-N8JESD-609代码:e3
长度:3 mm湿度敏感等级:3
功能数量:1端子数量:8
工作温度TJ-Max:125 °C工作温度TJ-Min:-40 °C
最大输出电流 1:0.5 A最大输出电压 1:1.8225 V
最小输出电压 1:1.7775 V标称输出电压 1:1.8 V
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260调节器类型:FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度:0.8 mm表面贴装:YES
技术:CMOS端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

ADM7170ACPZ-1.8-R7 数据手册

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ADM7170  
Data Sheet  
Parameter  
Symbol  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
EN INPUT STANDBY  
EN Input Logic High  
EN Input Logic Low  
EN Input Logic Hysteresis  
EN INPUT PRECISION  
EN Input Logic High  
EN Input Logic Low  
EN Input Logic Hysteresis  
EN Input Leakage Current  
EN Input Delay Time  
2.3 V ≤ VIN ≤ 6.5 V  
ENSTBY-HIGH  
ENSTBY-LOW  
ENSTBY-HYS  
1.1  
V
V
mV  
0.4  
80  
2.3 V ≤ VIN ≤ 6.5 V  
ENHIGH  
ENLOW  
ENHYS  
IEN-LKG  
TIEN-DLY  
1.11  
1.01  
1.2  
1.1  
100  
0.1  
130  
1.27  
1.16  
V
V
mV  
µA  
μs  
EN = VIN or GND  
From EN rising from 0 V to VIN to 0.1 V × VOUT  
1.0  
1 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output  
voltages greater than 2.3 V.  
2 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.  
3 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V  
output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V, or 4.5 V.  
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS  
Table 3.  
Parameter  
Symbol  
CMIN  
Test Conditions/Comments  
TA = −40°C to +125°C  
Min  
3.3  
Typ  
Max  
Unit  
µF  
MINIMUM INPUT AND OUTPUT CAPACITANCE1  
CAPACITOR ESR  
RESR  
TA = −40°C to +125°C  
0.001  
0.05  
Ω
1 Ensure that the minimum input and output capacitance is greater than 3.3 μF over the full range of operating conditions. The full range of operating conditions in the  
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;  
Y5V and Z5U capacitors are not recommended for use with any LDO.  
Rev. C | Page 4 of 23  
 

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