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ADM1486_05

更新时间： 2022-04-11 18:17:32

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ADM1486_05 数据手册

ADM1486

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADM1486

TOP VIEW

(Not to Scale)

GND

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

Receiver Output. When enabled, if A > B by 200 mV, RO = high. If A < B by 200 mV, RO = low.

Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a high impedance

state.

Driver Output Enable. A high level enables the driver differential outputs, A and B. A low level places it in a high

impedance state.

Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI forces

A high and B low.

GND

Ground Connection, 0 V.

Noninverting Receiver Input A/Driver Output A.

Inverting Receiver Input B/Driver Output B.

Power Supply, 5 V 5ꢀ.

V_CC

Table 5. Transmitting

DE Input

DI Input

B Output

A Output

Table 6. Receiving

A–B Input

RO Output

≥ +0.2 V

≤ −0.2 V

Inputs open

Rev. A | Page 6 of 16

1...3 4 567 8 9...16

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