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ADL5541ACPZ-R7 PDF预览

ADL5541ACPZ-R7

更新时间: 2024-01-06 15:31:21
品牌 Logo 应用领域
亚德诺 - ADI 射频微波
页数 文件大小 规格书
12页 285K
描述
50 MHz to 6 GHz RF/IF Gain Block

ADL5541ACPZ-R7 数据手册

 浏览型号ADL5541ACPZ-R7的Datasheet PDF文件第4页浏览型号ADL5541ACPZ-R7的Datasheet PDF文件第5页浏览型号ADL5541ACPZ-R7的Datasheet PDF文件第6页浏览型号ADL5541ACPZ-R7的Datasheet PDF文件第8页浏览型号ADL5541ACPZ-R7的Datasheet PDF文件第9页浏览型号ADL5541ACPZ-R7的Datasheet PDF文件第10页 
ADL5541  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
PIN 1  
RFIN  
GND  
GND  
CB  
1
2
3
4
8
7
6
5
RFOUT  
GND  
INDICATOR  
ADL5541  
GND  
TOP VIEW  
(Not to Scale)  
VPOS  
Figure 2. Pin Configuration  
Table 4. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
RFIN  
RF Input. Requires a dc blocking capacitor.  
2, 3, 6, 7  
GND  
Ground. Connect these pins to a low impedance ground plane.  
4
5
8
CB  
VPOS  
RFOUT  
Low Frequency Bypass. A 1 μF capacitor should be connected between this pin and ground.  
Power Supply for Bias Controller. Connect directly to external power supply.  
RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is tied to the  
external power supply. RF path requires a dc blocking capacitor.  
Exposed Paddle  
Exposed Paddle. Internally connected to GND. Solder to a low impedance ground plane.  
Rev. 0 | Page 7 of 12  
 

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