Datasheet > 射频和微波 > 射频/微波调制器/解调器> ADL5370ACPZ-R7

ADL5370ACPZ-R7

更新时间： 2024-02-09 02:57:13

品牌	Logo	应用领域
亚德诺 - ADI		射频调制器射频解调器微波调制器微波解调器射频和微波
页数	文件大小	规格书
20页	1091K
描述
300 MHz to 1000 MHz Quadrature Modulator

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技术参数
数据手册

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ADL5370ACPZ-R7 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	Reach Compliance Code：	unknown
风险等级：	5.64	特性阻抗：	50 Ω
构造：	COMPONENT	JESD-609代码：	e3
调制技术：	QUADRAPHASE	最大工作频率：	1300 MHz
最小工作频率：	250 MHz	最高工作温度：	85 °C
最低工作温度：	-40 °C	射频/微波设备类型：	MODULATOR
端子面层：	MATTE TIN	Base Number Matches：	1

ADL5370ACPZ-R7 数据手册

ADL5370

SPECIFICATIONS

V_S= 5 V; T_A= 25°C; LO = 0 dBm¹single-ended; baseband I/Q amplitude = 1.4 V p-p differential sine waves in quadrature with a 500 mV

dc bias; baseband I/Q frequency (f_BB) = 1 MHz, unless otherwise noted.

Table 1.

Parameter

Conditions

Min

Typ

Max

Unit

ADL5370

LO = 450 MHz

Operating Frequency Range

Range over which uncompensated sideband suppression < −30 dBc

Low frequency

High frequency

V_IQ= 1.4 V p-p differential

300

1000

6.2

MHz

dBm

dBc

Degrees

dBc

Output Power

Output P1 dB

Carrier Feedthrough

Sideband Suppression

Quadrature Error

I/Q Amplitude Balance

Second Harmonic

Third Harmonic

Output IP2

−50

−41

0.76

0.03

−65

−54

P_OUT− (f_LO+ (2 × f_BB)), P_OUT= 6.2 dBm

P_OUT− (f_LO+ (3 × f_BB)), P_OUT= 6.2 dBm

f1_BB= 3.5 MHz, f2_BB= 4.5 MHz, P_OUT= −2 dBm per tone

I/Q inputs = 0 V differential with a 500 mV common-mode bias,

20 MHz carrier offset

dBc

dBm

dBm/Hz

Output IP3

Noise Floor

−160

GSM

6 MHz carrier offset, P_OUT= 6 dBm, P_LO= 6 dBm

−157

dBc/Hz

LO INPUTS

LO Drive Level¹

Characterization performed at typical level

See Figure 9 for a plot of return loss vs. frequency

Pin IBBP, Pin IBBN, Pin QBBP, Pin QBBN

−7

dBm

Input Return Loss

BASEBAND INPUTS

I and Q Input Bias Level

Input Bias Current

Input Offset Current

Differential Input Impedance

Bandwidth (0.1 dB)

Bandwidth (1 dB)

POWER SUPPLIES

Voltage

500

0.1

2900

350

μA

kΩ

MHz

Current sourcing from each baseband input with a bias of 500 mV dc²

LO = 450 MHz, baseband input = 700 mV p-p sine wave on 500 mV dc

Pin VPS1 and Pin VPS2

4.75

5.25

Supply Current

205

¹High LO drive reduces noise at a 6 MHz carrier offset in GSM applications.

²See V-to-I converter discussion in the Circuit Description section for architecture information.

Rev. 0 | Page 3 of 20

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