Datasheet > ADL5369

ADL5369

更新时间： 2022-05-14 22:22:18

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
23页	486K
描述
300 MHz to 1100 MHz Balanced Mixer, LO Buffer, and RF Balun

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ADL5369 数据手册

Data Sheet

ADL5369

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

Table 5.

θ_JAis the junction to ambient thermal resistance (°C/W), θ_JBis

the junction to board thermal resistance (°C/W), and θ_JCis the

junction to case thermal resistance (°C/W). θ_JCis determined by

the mechanical design of the ADL5369 and is optimized to the

lowest possible value. θ_JAand θ_JBare functions of the design of

the PCB, and are under the control of the user. The data shown

in Table 6 is based on a JEDEC standard design and is provided

for comparison purposes.

Parameter

Rating

V_S

5.5 V

RF Input Level

LO Input Level

20 dBm

13 dBm

6.0 V

5.5 V

0.6 W

IFOP, IFON Bias Voltage

VGS0, VGS1, LOSW, PWDN

Internal Power Dissipation

Maximum Junction Temperature

Operating Temperature Range

Storage Temperature Range

Lead Temperature (Soldering, 60 sec)

150°C

−40°C to +85°C

−65°C to +150°C

260°C

Table 6. Thermal Resistance

Package Type

θ_JA

θ_JB

14.74

θ_JC

1.08

Unit

20-Lead LFCSP

°C/W

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

¹See JEDEC Standard JESD51-2 for information on optimizing thermal

impedance (PCB with 3 × 3 vias).

Junction to Board Thermal Impedance

The junction to board thermal impedance (θ_JB) is the thermal

impedance from the die to or near the component lead of the

ADL5369. For the ADL5369, θ_JBwas determined experimentally to

be 14.74°C/W with the device mounted on a 4-layer circuit board

(two of the layers being ground planes) in a configuration

similar to that of the ADL5369-EVALZ evaluation board. Board

size and complexity (number of layers) affect θ_JB; more layers tend

to reduce the thermal impedance slightly.

If the board temperature is known, use the junction to board

thermal impedance to calculate die temperature (also known as

junction temperature) to ensure that it does not exceed the speci-

fied limit of 150°C. For example, if the board temperature is

85°C, the die temperature is given by the equation

T_J= T_B+ (P_DISS× θ_JB)

where:

T_Jis the junction temperature.

T_Bis the board temperature measured at or near the component

lead.

_DISSis the power dissipated from the device.

The typical worst case power dissipation for the ADL5369 is

522 mW (5.5 V × 95 mA). Therefore, T_Jis

T_J= 85°C + (0.522 W × 14.74°C/W) = 92.70°C

ESD CAUTION

Rev. A | Page 5 of 23

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