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ADL5358ACPZ-R2 PDF预览

ADL5358ACPZ-R2

更新时间： 2024-02-18 13:19:39
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
24页 390K
描述
500 MHz to 1700 MHz, Dual-Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun

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ADL5358ACPZ-R2 技术参数

Source Url Status Check Date：2013-05-01 14:56:39.296是否无铅： 含铅
生命周期：End Of LifeReach Compliance Code：unknown
ECCN代码：5A991.BHTS代码：8542.39.00.01
风险等级：5.69其他特性：HIGH ISOLATION
特性阻抗：50 Ω构造：COMPONENT
最大工作频率：1700 MHz最小工作频率：500 MHz
最高工作温度：85 °C最低工作温度：-40 °C
射频/微波设备类型：DOUBLE BALANCEDBase Number Matches：1

ADL5358ACPZ-R2 数据手册

 浏览型号ADL5358ACPZ-R2的Datasheet PDF文件第3页浏览型号ADL5358ACPZ-R2的Datasheet PDF文件第4页浏览型号ADL5358ACPZ-R2的Datasheet PDF文件第5页浏览型号ADL5358ACPZ-R2的Datasheet PDF文件第7页浏览型号ADL5358ACPZ-R2的Datasheet PDF文件第8页浏览型号ADL5358ACPZ-R2的Datasheet PDF文件第9页 
ADL5358  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
1
2
3
4
5
6
7
8
9
27 LOI2  
VGS2  
MNIN  
MNCT  
COMM  
VPOS  
COMM  
VPOS  
COMM  
DVCT  
DVIN  
26  
25 VGS1  
VGS0  
ADL5358  
TOP VIEW  
(Not to Scale)  
24  
23 LOSW  
22 PWDN  
21 VPOS  
20  
19  
COMM  
LOI1  
NOTES  
1. NC = NO CONNECT.  
2. EXPOSED PAD MUST BE CONNECTED TO GROUND.  
Figure 2. Pin Configuration  
Table 6. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
MNIN  
MNCT  
RF Input for Main Channel. Internally matched to 50 Ω. This pin must be ac-coupled.  
Center Tap for Main Channel Input Balun. Bypass this pin to ground using low inductance capacitor.  
Device Common (DC Ground).  
3, 5, 7, 12, 20, 34 COMM  
4, 6, 10, 16,  
21, 30, 36  
VPOS  
Positive Supply Voltage.  
8
9
11  
DVCT  
DVIN  
DVGM  
Center Tap for Diversity Channel Input Balun. Bypass to ground using low inductance capacitor.  
RF Input for Diversity Channel. Internally matched to 50 Ω. This pin must be ac-coupled.  
Diverstiy Amplifier Bias Setting. Connect a 1.3 kΩ resistor to ground for typical operation.  
13, 14  
DVOP, DVON  
Diversity Channel Differential Open-Collector Outputs. DVOP and DVON should be pulled-up to  
VCC using external inductors.  
15  
17  
18, 28  
19  
DVLE  
DVLG  
NC  
Diversity Channel IF Return. This pin must be grounded.  
Diverstiy Channel LO Buffer Bias Setting. Connect a 1 kΩ resistor to ground for typical operation.  
No Connect.  
LOI1  
Local Oscillator Input 1. Internally matched to 50 Ω. This pin must be ac-coupled.  
22  
PWDN  
Connect to Ground for Normal Operation. Connect this pin to 3 V for disable mode when using  
VPOS < 3.6 V. PWDN pin must be grounded when VPOS > 3.6 V.  
23  
LOSW  
Local Oscillator Input Selection Switch. Set LOSW high to select LOI1 or set LOSW low to select LOI2.  
24, 25, 26  
27  
29  
VGS0, VGS1, VGS2 Gate to Source Control Voltages. For typical operation, set VGS0, VGS1, and VGS2 to low logic level.  
LOI2  
Local Oscillator Input 2. Internally matched to 50 Ω. This pin must be ac-coupled.  
Main Channel LO Buffer Bias Setting. Connect a 1 kΩ resistor to ground for typical operation.  
Main Channel IF Return. This pin must be grounded.  
MNLG  
MNLE  
31  
32, 33  
MNOP, MNON  
Main Channel Differential Open-Collector Outputs. MNOP and MNON should be pulled-up to  
VCC using external inductors.  
35  
Paddle  
MNGM  
EPAD  
Main Amplifier Bias Setting. Connect a 1.3 kΩ resistor to ground for typical operation.  
Exposed pad must be connected to ground.  
Rev. 0 | Page 6 of 24  
 
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