ADL5356ACPZ-R2

更新时间： 2024-02-27 00:00:20

品牌	Logo	应用领域
亚德诺 - ADI		放大器
页数	文件大小	规格书
24页	399K
描述
1200 MHz to 2500 MHz, Dual-Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun

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数据手册

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ADL5356ACPZ-R2 数据手册

ADL5356

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

27 LOI2

VGS2

MNIN

MNCT

COMM

VPOS

COMM

VPOS

COMM

DVCT

DVIN

25 VGS1

VGS0

ADL5356

TOP VIEW

(Not to Scale)

23 LOSW

22 PWDN

21 VPOS

COMM

LOI1

NOTES

1. NC = NO CONNECT.

2. EXPOSED PAD MUST BE CONNECTED TO GROUND.

Figure 2. Pin Configuration

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

MNIN

MNCT

RF Input for Main Channel. Internally matched to 50 Ω. Must be ac-coupled.

Center Tap for Main Channel Input Balun. Bypass to ground using low inductance capacitor.

Device Common (DC Ground).

3, 5, 7, 12, 20, 34 COMM

4, 6, 10, 16,

21, 30, 36

VPOS

Positive Supply Voltage.

DVCT

DVIN

Center Tap for Diversity Channel Input Balun. Bypass to ground using low inductance capacitor.

RF Input for Diversity Channel. Internally matched to 50 Ω. Must be ac-coupled.

DVGM

Diverstiy Amplifier Bias Setting. Connect 1.3 kΩ resistor to ground for typical operation.

13, 14

DVOP, DVON

Diversity Channel Differential Open-Collector Outputs. DVOP and DVON should be pulled-up to

VCC using external inductors.

18, 28

DVLE

DVLG

Diversity Channel IF Return. This pin must be grounded.

Diverstiy Channel LO Buffer Bias Setting. Connect 1 kΩ resistor to ground for typical operation.

No Connect.

LOI1

Local Oscillator Input 1. Internally matched to 50 Ω. Must be ac-coupled.

PWDN

Connect to Ground for Normal Operation. Connect pin to 3 V for disable mode when using

VPOS < 3.6 V. PWDN pin must be grounded when VPOS > 3.6 V.

LOSW

Local Oscillator Input Selection Switch. Set LOSW high to select LOI1 or set LOSW low to select LOI2.

24, 25, 26

VGS0, VGS1, VGS2 Gate to Source Control Voltages. For typical operation, set VGS0, VGS1, and VGS2 to low logic level.

LOI2

Local Oscillator Input 2. Internally matched to 50 Ω. Must be ac-coupled.

Main Channel LO Buffer Bias Setting. Connect 1 kΩ resistor to ground for typical operation.

Main Channel IF Return. This pin must be grounded.

MNLG

MNLE

32, 33

MNOP, MNON

Main Channel Differential Open-Collector Outputs. MNOP and MNON should be pulled-up to

VCC using external inductors.

Paddle

MNGM

EPAD

Main Amplifier Bias Setting. Connect 1.3 kΩ resistor to ground for typical operation.

Exposed pad must be connected to ground.

Rev. 0 | Page 6 of 24

1...3 4 567 8 9...24

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