Datasheet > ADA4932-1YCPZ-R21

ADA4932-1YCPZ-R21

更新时间： 2022-04-12 17:14:32

品牌	Logo	应用领域
亚德诺 - ADI		驱动器
页数	文件大小	规格书
28页	477K
描述
Low Power Differential ADC Driver

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ADA4932-1YCPZ-R21 数据手册

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ADA4932-1/ADA4932-2

5 V OPERATION

T_A= 25°C, +V_S= 5 V, −V_S= 0 V, V_ꢀCM= 2.5 V, R_F= 499 Ω, R_G= 499 Ω, R_T= 53.6 Ω (when used), R_{L, dm}= 1 kꢁ, unless otherwise noted.

All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 55 for signal definitions.

±±_INto V_{OUT, dm}Performance

Table 4.

Parameter

Conditions

Min

Typ

Max

Unit

DYNAMIC PERFORMANCE

−3 dB Small Signal Bandwidth

V_{OUT, dm}= 0.1 V p-p

V_{OUT, dm}= 0.1 V p-p, R_F= R_G= 205 Ω

V_{OUT, dm}= 2.0 V p-p

560

990

315

320

120

200

2200

MHz

V/μs

−3 dB Large Signal Bandwidth

Bandwidth for 0.1 dB Flatness

V_{OUT, dm}= 2.0 V p-p, R_F= R_G= 205 Ω

V_{OUT, dm}= 2.0 V p-p, ADA4932-1, R_L= 200 Ω

V_{OUT, dm}= 2.0 V p-p, ADA4932-2, R_L= 200 Ω

V_{OUT, dm}= 2 V p-p, 25% to 75%

V_{OUT, dm}= 2 V step

V_IN= 0 V to 2.5 V ramp, G = 2

See Figure 54 for distortion test circuit

V_{OUT, dm}= 2 V p-p, 1 MHz

V_{OUT, dm}= 2 V p-p, 10 MHz

V_{OUT, dm}= 2 V p-p, 20 MHz

V_{OUT, dm}= 2 V p-p, 50 MHz

V_{OUT, dm}= 2 V p-p, 1 MHz

V_{OUT, dm}= 2 V p-p, 10 MHz

V_{OUT, dm}= 2 V p-p, 20 MHz

V_{OUT, dm}= 2 V p-p, 50 MHz

f₁= 30 MHz, f₂= 30.1 MHz, V_{OUT, dm}= 2 V p-p

f = 1 MHz

Slew Rate

Settling Time to 0.1%

Overdrive Recovery Time

NOISE/HARMONIC PERFORMANCE

Second Harmonic

−110

−100

−90

−72

−120

−100

−87

−70

−91

3.6

dBc

Third Harmonic

IMD

dBc

Voltage Noise (RTI)

Input Current Noise

Crosstalk

nV/√Hz

pA/√Hz

f = 1 MHz

f = 10 MHz, ADA4932-2

1.0

−100

INPUT CHARACTERISTICS

Offset Voltage

V_+DIN= V_−DIN= V_OCM= 2.5 V

T_MINto T_MAXvariation

−2.2

−5.3

−0.25

0.5

−3.7

−3.0

−9.5

+2.2

μV/°C

Input Bias Current

−0.23 μA

nA/°C

+0.25 μA

T_MINto T_MAXvariation

Input Offset Current

Input Resistance

0.025

Differential

Common mode

0.5

−V_S+ 0.2 to

+V_S− 1.8

MΩ

Input Capacitance

Input Common-Mode Voltage Range

CMRR

Open-Loop Gain

∆V_{OUT, dm}/∆V_{IN, cm}, ∆V_{IN, cm}= 1 V

−100

−87

−60

OUTPUT CHARACTERISTICS

Output Voltage Swing

Maximum ∆V_OUT, single-ended output,

R_F= R_G= 10 kΩ, R_L= 1 kΩ

200 kHz, R_{L, dm}= 10 Ω, SFDR = 67 dB

∆V_{OUT, cm}/∆V_{OUT, dm}, ∆V_{OUT, dm}= 1 V p-p, 1 MHz,

see Figure 53 for output balance test circuit

−V_S+ 1.15 to

+V_S− 1.15

−V_S+ 1.02 to

+V_S− 1.02

Linear Output Current

Output Balance Error

mA rms

−64

Rev. A | Page 5 of 28

1 2 3 456 7 8...28

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