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ADA4558WHCPZ-RL PDF预览

ADA4558WHCPZ-RL

更新时间: 2022-06-24 15:43:28
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
12页 385K
描述
Bridge Sensor Signal Conditioner IC with LIN Interface, Nonlinearity Correction, Temperature Compensation

ADA4558WHCPZ-RL 数据手册

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Data Sheet  
ADA4558  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
15 ISINK  
14 TNEG  
13 TPOS  
1
2
3
4
5
DVDD  
DGND  
TESTD  
SWDIO  
SWCLK  
ADA4558  
TOP VIEW  
(Not to Scale)  
12  
RREFN  
11 VREG  
NOTES  
1. NIC = NOT INTERNALLY CONNECTED. THIS PIN IS NOT INTERNALLY CONNECTED.  
CONNECT NIC TO THE GROUND PLANE.  
2. CONNECT THE EXPOSED PAD OF THE LFCSP PACKAGE TO THE ANALOG GROUND PLANE.  
ENSURE THAT AGND IS CONNECTED TO DGND AND LINGND AT A SINGLE POINT ON THE PCB.  
Figure 2. Pin Configuration  
Table 4. Pin Function Descriptions  
Pin No. Mnemonic Description  
1
DVDD  
1.8 V Low Dropout (LDO) Digital Supply. Add a 0.1 μF capacitor placed as close to Pin 1 as possible between DVDD  
and the DGND plane.  
2
3
4
5
6
7
8
9
DGND  
TESTD  
SWDIO  
SWCLK  
NIC  
VNEG  
TEST1  
VPOS  
TEST2  
VREG  
Digital Ground.  
Test Pin. Analog Devices, Inc., uses this pin at the production test. Connect TESTD to the DGND plane in the application.  
Test Pin. Analog Devices uses this pin at the production test. Connect SWDIO to the DGND plane in the application.  
Test Pin. Analog Devices uses this pin at the production test. Connect SWCLK to the DGND plane in the application.  
Not Internally Connected. This pin is not internally connected. Connect NIC to the ground plane.  
Negative Input. Pin 7 is the negative input to the PGA from the external resistive bridge.  
Test Pin. Analog Devices uses this pin at the production test. Connect TEST1 to the AGND plane in the application.  
Positive Input. Pin 9 is the positive input to the PGA from an external resistive bridge.  
10  
11  
Test Pin. Analog Devices uses this pin at the production test. Connect TEST2 to the AGND plane in the application.  
Regulated 4.0 V Output. Pin 11 drives the top of the external bridge. Add a 0.1 μF capacitor between VREG and the  
AGND plane, placed as close to the VREG pin as possible.  
12  
RREFN  
Reference Resistor. Pin 12 is the reference resistor for the external temperature sensor sense connection. Connect  
Pin 12 to ground when there is no external temperature sensor.  
13  
14  
15  
TPOS  
TNEG  
ISINK  
External Temperature Positive Input. Connect Pin 13 to ground when there is no external temperature sensor.  
External Temperature Sensor Negative Input. Connect Pin 14 to ground when there is no external temperature sensor.  
Current Sink. Pin 15 drives the external temperature sensor. Connect Pin 15 to ground when there is no external  
temperature sensor.  
16  
17  
AGND  
VDD12  
Analog Ground.  
Supply. Connect the 12 V battery supply to this pin. Decouple VDD12 with a 1 µF capacitor. A 100 nF capacitor can  
be used only when a 1 µF capacitor to ground is placed on the anode of the diode on the module battery supply.  
18  
19  
LIN2  
LIN  
Not in Use. The LIN2 function is not in use. Connect LIN2 to the LIN pin.  
LIN Compliant Interface. All communication to and from the IC is via the LIN pin. Connect a LIN capacitor to ground  
on this pin, per the LIN specification.  
20  
LINGND  
EPAD  
Local LIN Ground.  
Exposed Pad. Connect the exposed pad of the LFCSP to the analog ground plane. Ensure that AGND is connected  
to DGND and LINGND at a single point on the PCB.  
Rev. 0 | Page 7 of 12  
 

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