Datasheet > ADA4558

ADA4558

更新时间： 2022-06-24 15:43:28

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
12页	385K
描述
Bridge Sensor Signal Conditioner IC with LIN Interface, Nonlinearity Correction, Temperature Compensation

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ADA4558 数据手册

ADA4558

Data Sheet

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

EXTERNAL TEMPERATURE SENSOR

Valid Temperature Range

External Temperature Sensor

Accuracy

−50

−0.5

+165

+0.5

°C

Two calibration points using a PT1000

sensor

One calibration point using a PT1000

sensor

−2

°C

Gain Setting Accuracy

LIN INPUT AND OUTPUT STAGE

Voltage

0.2

Compliant with LIN Specification 2.1

Voltage range over which LIN is

functional

Baud Rate

Current Limit for Driver (LIN Bus

Dominant State)

200

kbps

ILIN_DOM_MAX Pulled to maximum VDD12

Driver Off

Input Leakage

LIN Pin Current

While Ground Disconnected

ILIN_PASS_REC

ILIN_PAS_DOM

8 V < VDD12 < 18 V, V_LIN≥ VDD12

V_LIN= 0 V

μA

−1

ILIN_NO_GND

ILIN_NO_BAT

VDD12 = 12 V, control unit

disconnected from ground

VDD12 disconnected, 0 V < V_LIN< 18 V

μA

While Battery Disconnected

LIN Receiver

Dominant State

Recessive State

Center Voltage

Hysteresis Voltage

VLIN_DOM

VLIN_REC

VLIN_CNT

VHYS

%VDD12

% VDD12

kΩ

47.5

52.5

17.5

Slave Termination Resistance

LIN RECEIVER TIMING PARAMETERS

Propagation Delay of Receiver

Symmetry of Receiver Propagation

Delay

RSLAVE

−2

t_{RX_PD}

t_{RX_SYM}

µs

Rising edge with the respect to falling

edge

LIN DRIVER TIMING PARAMETERS

Bus load conditions (C_BUS, R_BUS): 1 nF and

1 kΩ; 6.8 nF and 660 Ω; 10 nF and 500 Ω

Duty Cycle 1

Duty Cycle 2

Duty Cycle 3

Duty Cycle 4

ADC Measurement Time

LIN SLEEP/WAKE-UP

For proper operation at 20 kbps

For proper operation at 10.4 kbps

To valid reading

0.396

0.417

0.581

0.590

120

µs

Force sleep mode by sending a

diagnostic master request frame (frame

identifier = 0x3C, with the first data

byte equal to 0x00); sleep mode is also

entered if there is no activity on the LIN

bus for a certain time

Auto Sleep Enable Time

Minimum Dominant Time

Wake-up occurs if a recessive to

dominant transition on the LIN bus is

followed by a dominant level on the LIN

bus maintained for a certain time

(minimum dominant time), followed by

a dominant to recessive transition; the

dominant to recessive transition wakes

up the device

sec

150

µs

Rev. 0 | Page 4 of 12

1 2 345 6 7...12

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