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AD8398ACPZ-R2 PDF预览

AD8398ACPZ-R2

更新时间: 2024-01-08 22:29:51
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
13页 389K
描述
VDSL, Dual Line Driver with Shutdown

AD8398ACPZ-R2 技术参数

Source Url Status Check Date:2013-05-01 14:56:26.233是否无铅: 含铅
是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:CSP针数:16
Reach Compliance Code:compliant风险等级:5.76
JESD-609代码:e3湿度敏感等级:3
端子面层:Matte Tin (Sn)Base Number Matches:1

AD8398ACPZ-R2 数据手册

 浏览型号AD8398ACPZ-R2的Datasheet PDF文件第2页浏览型号AD8398ACPZ-R2的Datasheet PDF文件第3页浏览型号AD8398ACPZ-R2的Datasheet PDF文件第4页浏览型号AD8398ACPZ-R2的Datasheet PDF文件第6页浏览型号AD8398ACPZ-R2的Datasheet PDF文件第7页浏览型号AD8398ACPZ-R2的Datasheet PDF文件第8页 
AD8398A  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
Table 2.  
MAXIMUM POWER DISSIPATION  
Parameter  
Rating  
The maximum safe power dissipation for the AD8398A is limited  
by its junction temperature (TJ) on the die. The maximum safe  
TJ of plastic encapsulated devices, as determined by the glass  
transition temperature of the plastic, is 150°C. Temporarily  
exceeding this limit may cause a shift in the parametric  
performance due to a change in the stresses exerted on the  
die by the package. Exceeding this limit for an extended period  
can result in device failure.  
Power Supplies (VCC − VEE)  
Power Dissipation  
Storage Temperature Range  
Operating Temperature Range  
Lead Temperature (Soldering, 10 sec)  
Junction Temperature  
13.2 V  
(TJ MAX − TA)/θJA  
−65°C to +125°C  
−40°C to +85°C  
300°C  
150°C  
Stresses at or above those listed under Absolute Maximum  
Ratings may cause permanent damage to the product. This is a  
stress rating only; functional operation of the product at these  
or any other conditions above those indicated in the operational  
section of this specification is not implied. Operation beyond  
the maximum operating conditions for extended periods may  
affect product reliability.  
Figure 3 shows the maximum safe power dissipation in the  
package vs. the ambient temperature for the 16-lead LFCSP_WQ  
on a 4-layer board with six vias connecting the exposed pad to  
the GND plane layer.  
6
T
= 150°C  
J
5
4
3
2
1
THERMAL RESISTANCE  
θJA is specified with the device soldered on a JEDEC circuit board  
and the thermal pad connected to the GND plane layer using  
six vias.  
Table 3. Thermal Resistance  
Package Type  
θJA  
Unit  
16-Lead LFCSP_WQ  
35.6  
°C/W  
0
–40 –30 –20 –10  
0
10 20 30 40 50 60 70 80  
AMBIENT TEMPERATURE (°C)  
Figure 3. Maximum Safe Power Dissipation vs. Ambient Temperature,  
4-Layer JEDEC Board with Six Thermal Vias  
ESD CAUTION  
Rev. E | Page 4 of 12  
 
 
 
 
 

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