AD8203
SPECIFICATIONS
SINGLE SUPPLY
TA = operating temperature range, VS = 5 V, unless otherwise noted.
Table 1.
AD8203 SOIC
AD8203 MSOP
AD8203 Die
Typ
Parameter
Conditions
Min
Typ
14
1
Max
Min
Typ
14
1
Max
Min
Max
Unit
SYSTEM GAIN
Initial
14
V/V
Error
0.02 ≤ VOUT ≤ 4.8 V dc @ 25°C
−0.3
+0.3
20
−0.3
+0.3
25
−0.3
+0.3
%
vs. Temperature
VOLTAGE OFFSET
Input Offset (RTI)
vs. Temperature
1
30
ppm/°C
VCM = 0.15 V; 25°C
−40°C to +125°C
−40°C to +150°C
−1
−10
+1
−2
−20
+2
+20
−1
−10
−15
+1
+10
+15
mV
μV/°C
μV/°C
+0.3 +10
+2
+0.3
+5
INPUT
Input Impedance
Differential
Common Mode
CMV
260
130
−6
320
160
380
190
+30
260
130
−6
320
160
380
190
+30
260
130
−6
320
160
380
190
+30
kΩ
kΩ
V
Continuous
VCM = −6 V to +30 V
f = dc
CMRR1
82
82
80
82
82
80
82
82
80
dB
dB
dB
f = 1 kHz
f = 10 kHz2
PREAMPLIFIER
Gain
Gain Error
Output Voltage Range
Output Resistance
OUTPUT BUFFER
Gain
7
7
7
V/V
%
V
−0.3
0.02
97
+0.3
4.8
103
−0.3
0.02
97
+0.3
4.8
103
−0.3
0.02
97
+0.3
4.8
103
100
2
100
2
100
2
kΩ
V/V
%
V
nA
Ω
Gain Error
0.02 ≤ VOUT ≤ 4.8 V dc
−0.3
0.02
+0.3
4.8
−0.3
0.02
+0.3
4.8
−0.3
0.02
+0.3
4.8
Output Voltage Range
Input Bias Current
Output Resistance
DYNAMIC RESPONSE
System Bandwidth
Slew Rate
40
2
40
2
40
2
VIN = 0.01 V p-p, VOUT = 0.14 V p-p 40
VIN = 0.28 V, VOUT = 4 V step
60
0.33
40
60
0.33
40
60
0.33
kHz
V/μs
NOISE
0.1 Hz to 10 Hz
Spectral Density, 1 kHz (RTI)
POWER SUPPLY
Operating Range
Quiescent Current vs.
Temperature
10
300
10
300
10
300
μV p-p
nV/√Hz
3.5
12
3.5
75
12
1.0
3.5
75
12
1.0
V
mA
VO = 0.1 V dc
0.25 1.0
0.25
83
0.25
83
PSRR
VS = 3.5 V to 12 V
75
83
dB
TEMPERATURE RANGE
For Specified Performance
−40
+125 −40
+125 −40
+150 °C
1 Source imbalance <2 Ω.
2 The AD8203 preamplifier exceeds 80 dB CMRR at 10 kHz. However, since the signal is available only by way of a 100 kΩ resistor, even the small amount of pin-to-pin
capacitance between Pin 1, Pin 8 and Pin 3, Pin 4 may couple an input common-mode signal larger than the greatly attenuated preamplifier output. The effect of pin-
to-pin coupling may be neglected in all applications by using filter capacitors at Node 3.
Rev. B | Page 3 of 20