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AD8007AR-REEL7 PDF预览

AD8007AR-REEL7

更新时间: 2024-02-08 08:39:15
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
20页 424K
描述
Ultralow Distortion High Speed Amplifiers

AD8007AR-REEL7 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:MS-012AA, SOIC-8针数:8
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.33.00.01风险等级:5.26
放大器类型:OPERATIONAL AMPLIFIER架构:CURRENT-FEEDBACK
25C 时的最大偏置电流 (IIB):8 µA标称共模抑制比:59 dB
频率补偿:YES最大输入失调电压:4000 µV
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.9 mm低-偏置:NO
低-失调:NO微功率:NO
湿度敏感等级:1负供电电压上限:-6.3 V
标称负供电电压 (Vsup):-5 V功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
功率:NO电源:+-2.5/+-6/5/12 V
可编程功率:NO认证状态:Not Qualified
座面最大高度:1.75 mm最小摆率:665 V/us
标称压摆率:1000 V/us子类别:Operational Amplifier
最大压摆率:10.2 mA供电电压上限:6.3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽带:YES
宽度:3.9 mm

AD8007AR-REEL7 数据手册

 浏览型号AD8007AR-REEL7的Datasheet PDF文件第1页浏览型号AD8007AR-REEL7的Datasheet PDF文件第2页浏览型号AD8007AR-REEL7的Datasheet PDF文件第3页浏览型号AD8007AR-REEL7的Datasheet PDF文件第5页浏览型号AD8007AR-REEL7的Datasheet PDF文件第6页浏览型号AD8007AR-REEL7的Datasheet PDF文件第7页 
AD8007/AD8008  
ABSOLUTE MAXIMUM RATINGS*  
RMS output voltages should be considered. If RL is referenced  
to VS, as in single-supply operation, then the total drive power  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . See Figure 2  
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . VS  
is VS ϫ IOUT  
.
If the rms signal levels are indeterminate, then consider the  
worst case, when VOUT = VS/4 for RL to midsupply:  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . .  
1.0 V  
Output Short Circuit Duration . . . . . . . . . . . . . . See Figure 2  
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +125°C  
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C  
Lead Temperature Range (soldering 10 sec) . . . . . . . . . 300°C  
V 2  
S   
4
PD = V × I  
+
(
)
S
S
RL  
In single-supply operation, with RL referenced to VS, worst case is  
*Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; functional operation of the  
device at these or any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability.  
VS  
2
VOUT  
=
Airflow will increase heat dissipation, effectively reducing θJA.  
Also, more metal directly in contact with the package leads from  
metal traces, through holes, ground, and power planes will  
reduce the θJA. Care must be taken to minimize parasitic capaci-  
tances at the input leads of high speed op amps as discussed in  
the board layout section.  
MAXIMUM POWER DISSIPATION  
The maximum safe power dissipation in the AD8007/AD8008  
packages is limited by the associated rise in junction temperature  
(TJ) on the die. The plastic encapsulating the die will locally reach  
the junction temperature. At approximately 150°C, which is the  
glass transition temperature, the plastic will change its proper-  
ties. Even temporarily exceeding this temperature limit may  
change the stresses that the package exerts on the die, perma-  
nently shifting the parametric performance of the AD8007/  
AD8008. Exceeding a junction temperature of 175°C for an  
extended period of time can result in changes in the silicon  
devices, potentially causing failure.  
Figure 2 shows the maximum safe power dissipation in the pack-  
age versus ambient temperature for the SOIC-8 (125°C/W),  
MSOP (150°C/W), and SC70 (210°C/W) packages on a JEDEC  
standard 4-layer board. θJA values are approximations.  
2.0  
The still-air thermal properties of the package and PCB (θJA),  
ambient temperature (TA), and the total power dissipated in the  
package (PD) determine the junction temperature of the die.  
The junction temperature can be calculated as follows:  
1.5  
MSOP-8  
SOIC-8  
1.0  
T = T + P × θ  
(
)
J
A
D
JA  
SC70-5  
The power dissipated in the package (PD) is the sum of the quies-  
cent power dissipation and the power dissipated in the package  
due to the load drive for all outputs. The quiescent power is the  
voltage between the supply pins (VS) times the quiescent current  
(IS). Assuming the load (RL ) is referenced to midsupply, the  
total drive power is VS/2 ϫ IOUT, some of which is dissipated in the  
package and some in the load (VOUT ϫ IOUT). The difference  
between the total drive power and the load power is the drive  
power dissipated in the package.  
0.5  
0
–60  
–40  
–20  
0
20  
40  
60  
80  
100  
AMBIENTTEMPERATURE – ؇C  
Figure 2. Maximum Power Dissipation vs.  
Temperature for a 4-Layer Board  
PD = quiescent power + (total drive power – load power):  
OUTPUT SHORT CIRCUIT  
Shorting the output to ground or drawing excessive current for  
the AD8007/AD8008 will likely cause catastrophic failure.  
2
VS VOUT  
VOUT  
RL  
PD = V × I  
+
×
(
)
S
S
2
RL  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although the  
AD8007/AD8008 features proprietary ESD protection circuitry, permanent damage may occur on  
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are  
recommended to avoid performance degradation or loss of functionality.  
–4–  
REV. D  

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