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AD8007_15 PDF预览

AD8007_15

更新时间: 2022-02-26 12:44:52
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亚德诺 - ADI /
页数 文件大小 规格书
21页 587K
描述
Ultralow Distortion, High Speed Amplifiers

AD8007_15 数据手册

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AD8007/AD8008  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
RMS output voltages should be considered. If RL is referenced to  
VS, as in single-supply operation, then the total drive power is  
Parameter  
Rating  
VS × IOUT  
.
Supply Voltage  
12.6 V  
If the rms signal levels are indeterminate, then consider the  
worst case, when VOUT = VS/4 for RL to midsupply  
Power Dissipation  
See Figure 5  
VS  
Common-Mode Input Voltage  
Differential Input Voltage  
Output Short-Circuit Duration  
Storage Temperature Range  
Operating Temperature Range  
Lead Temperature (Soldering, 10 sec)  
2
1.0 V  
V
4
S
See Figure 5  
−65°C to +125°C  
−40°C to +85°C  
300°C  
PD =(VS × IS ) +  
RL  
In single-supply operation, with RL referenced to VS, worst case is  
VOUT = VS/2.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Airflow increases heat dissipation, effectively reducing θJA. In  
addition, more metal directly in contact with the package leads  
from metal traces, through-holes, ground, and power planes  
reduces the θJA. Care must be taken to minimize parasitic  
capacitances at the input leads of high speed op amps, see the  
Layout Considerations section.  
Figure 5 shows the maximum safe power dissipation in the  
package vs. the ambient temperature for the SOIC-8 (125°C/W),  
MSOP-8 (150°C/W), and SC70-5 (210°C/W) packages on a  
JEDEC standard 4-layer board. θJA values are approximations.  
2.0  
MAXIMUM POWER DISSIPATION  
The maximum safe power dissipation in the AD8007/AD8008  
packages is limited by the associated rise in junction temperature  
(TJ) on the die. The plastic encapsulating the die locally reaches  
the junction temperature. At approximately 150°C, which is the  
glass transition temperature, the plastic changes its properties.  
Even temporarily exceeding this temperature limit can change  
the stresses that the package exerts on the die, permanently  
shifting the parametric performance of the AD8007/AD8008.  
Exceeding a junction temperature of 175°C for an extended  
time can result in changes in the silicon devices, potentially  
causing failure.  
1.5  
MSOP-8  
SOIC-8  
1.0  
SC70-5  
0.5  
The still-air thermal properties of the package and PCB (θJA),  
ambient temperature (TA), and the total power dissipated in the  
package (PD) determine the junction temperature of the die.  
The junction temperature can be calculated as  
0
–60  
–40  
–20  
0
20  
40  
60  
80  
100  
AMBIENT TEMPERATURE (°C)  
TJ = TA + (PD × θJA)  
Figure 5. Maximum Power Dissipation vs. Temperature for a 4-Layer Board  
The power dissipated in the package (PD) is the sum of the  
quiescent power dissipation and the power dissipated in the  
package due to the load drive for all outputs. The quiescent  
power is the voltage between the supply pins (VS) times the  
quiescent current (IS). Assuming the load (RL ) is referenced to  
midsupply, the total drive power is VS/2 × IOUT, some of which is  
dissipated in the package and some in the load (VOUT × IOUT).  
The difference between the total drive power and the load  
power is the drive power dissipated in the package.  
OUTPUT SHORT CIRCUIT  
Shorting the output to ground or drawing excessive current for  
the AD8007/AD8008 will likely cause catastrophic failure.  
ESD CAUTION  
PD = Quiescent Power + (Total Drive Power Load Power)  
2
VOUT  
RL  
VS VOUT  
PD = (VS × IS ) +  
×
2
RL  
Rev. E | Page 6 of 20  
 
 

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