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AD7741YR PDF预览

AD7741YR

更新时间: 2024-01-28 20:22:54
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
12页 134K
描述
Single and Multichannel, Synchronous Voltage-to-Frequency Converters

AD7741YR 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.29
转换器类型:VOLTAGE TO FREQUENCY CONVERTERJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.9 mm
最大线性误差 (EL):0.024%湿度敏感等级:1
功能数量:1端子数量:8
最大工作频率:6.144 MHz最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
最大正输入电压:2.5 V认证状态:Not Qualified
座面最大高度:2.59 mm最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

AD7741YR 数据手册

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AD7741/AD7742  
AD7741 PIN FUNCTION DESCRIPTION  
Pin No.  
Mnemonic  
Function  
1
VDD  
Power Supply Input. These parts can be operated from +4.75 V to +5.25 V and the supply should  
be adequately decoupled to GND.  
2
3
GND  
CLKOUT  
Ground reference point for all circuitry on the part.  
External Clock Output. When the master clock for the device is a crystal, the crystal is connected  
between CLKIN and CLKOUT. When an external clock is applied to CLKIN, the CLKOUT pin  
provides an inverted clock signal. This clock should be buffered if it is to be used as a clock source  
elsewhere in the system.  
4
5
CLKIN  
External Clock Input. The master clock for the device can be provided in the form of a crystal or an  
external clock. A crystal may be tied across the CLKIN and CLKOUT pins. Alternatively, the  
CLKIN pin may be driven by a CMOS-compatible clock and CLKOUT left unconnected. The  
frequency of the master clock may be as high as 6 MHz.  
This is the reference input to the core of the VFC and defines the span of the VFC. If this pin is left  
unconnected, the internal 2.5 V reference is used. Alternatively, a precision external reference (e.g.,  
REF192) may be used to overdrive the internal reference. The internal bandgap reference has a  
high output impedance in order to allow it to be overdriven.  
REFIN/OUT  
6
7
8
VIN  
PD  
The analog input to the VFC. It has an input range from 0 V to VREF. This input is buffered so it  
draws virtually no current from whatever source is driving it.  
Active Low Power-Down pin. When this input is low, the part enters power-down mode where it  
typically consumes 15 µA of current.  
Frequency Output. This pin provides the output of the synchronous VFC.  
fOUT  
PIN CONFIGURATION  
1
2
3
4
8
7
6
5
f
V
OUT  
DD  
AD7741  
TOP VIEW  
(Not to Scale)  
GND  
CLKOUT  
CLKIN  
PD  
V
IN  
REFIN/OUT  
REV. 0  
–5–  

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