AD7741BNZ

更新时间： 2024-01-06 01:17:02

品牌	Logo	应用领域
亚德诺 - ADI		转换器模拟特殊功能转换器光电二极管 PC
页数	文件大小	规格书
12页	120K
描述
Single and Multichannel, Synchronous Voltage-to-Frequency Converters

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AD7741BNZ 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP,	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.29
转换器类型：	VOLTAGE TO FREQUENCY CONVERTER	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3	长度：	4.9 mm
最大线性误差 (EL)：	0.024%	湿度敏感等级：	1
功能数量：	1	端子数量：	8
最大工作频率：	6.144 MHz	最高工作温度：	105 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
最大正输入电压：	2.5 V	认证状态：	Not Qualified
座面最大高度：	2.59 mm	最大供电电压：	5.25 V
最小供电电压：	4.75 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	3.9 mm	Base Number Matches：	1

AD7741BNZ 数据手册

AD7741/AD7742

TERMINOLOGY

GENERAL DESCRIPTION

INTEGRAL NONLINEARITY

The AD7741/AD7742 are a new generation of CMOS synchro-

nous Voltage-to-Frequency Converters (VFCs) that use a

charge-balance conversion technique. The AD7741 is a single-

channel version and the AD7742 is a multichannel version. The

input voltage signal is applied to a proprietary programmable

gain front-end based around an analog modulator that converts

the input voltage into an output pulse train.

For the VFC, Integral Nonlinearity (INL) is a measure of the

maximum deviation from a straight line passing through the

actual endpoints of the VFC transfer function. The error is

expressed in % of the frequency span:

Frequency Span = f_OUT(max)– f_OUT(min)

OFFSET ERROR

The parts also contain an on-chip +2.5 V bandgap reference

and operate from a single +5 V supply. A block diagram of the

AD7742 is shown in Figure 2.

This is a measure of the offset error of the VFC. Ideally, the

minimum output frequency (corresponding to minimum input

voltage) is 5% of f_CLKINThe deviation from this value is the

offset error. It is expressed in terms of the error referred to the

input voltage. It is expressed in mV.

INTEGRATOR

COMPARATOR

SWITCHED

CAPS

OUT

INPUT

MUX

SWITCHED

CAPS

GAIN ERROR

This is a measure of the span error of the VFC. The gain is the

scale factor that relates the input V_INto the output f_OUT. The

gain error is the deviation in slope of the actual VFC transfer

characteristic from the ideal expressed as a percentage of the

full-scale span.

Figure 2. AD7742 Block Diagram

Input Amplifier Stage

The buffered input stage for the analog inputs presents a high

impedance, allowing significant external source impedances.

The four analog inputs (V_IN1 through V_IN4) each have a voltage

range from +0.5 V to V_DD– 1.75 V. This is an absolute voltage

range and is relative to the GND pin.

OFFSET ERROR DRIFT

This is a measure of the change in Offset Error with changes in

temperature. It is expressed in µV/°C.

GAIN ERROR DRIFT

This is a measure of the change in Gain Error with changes in

temperature. It is expressed in (ppm of span)/°C.

In the case of the AD7742 multichannel part, a differential

multiplexer switches one of the differential input channels to the

VFC modulator. The multiplexer is controlled by two pins, A1

and A0. See Table I for channel configurations.

POWER-SUPPLY REJECTION RATIO (PSRR)

This indicates how the output of the VFC is affected by changes

in the supply voltage. Again, this error is referred to the input

voltage. The input voltage is kept constant and the V_DDsupply

is varied ±5%. The ratio of the apparent change in input voltage

to the change in V_DDis measured in dBs.

Table I. AD7742 Input Channel Selection

V_IN(+)

V_IN(–)

Type

V_IN1

V_IN2

V_IN3

V_IN1

V_IN4

V_IN2

Pseudo Differential

Full Differential

CHANNEL-TO-CHANNEL ISOLATION

This is a ratio of the amplitude of the signal at the input of one

channel to a sine wave on the input of another channel. It is

measured in dBs.

Full Differential

Analog Input Ranges

The AD7741 has a unipolar single-ended input channel whereas

the AD7742 contains four input channels which may be con-

figured as two fully differential channels or as three pseudo-

differential channels. The AD7742 also has a X1/X2 gain

option on the front end. The channel and gain settings are

pin-programmable.

COMMON-MODE REJECTION

For the AD7742, the output frequency should remain un-

changed provided the differential input remains unchanged

although its common-mode level may change. The CMR is the

ratio of the apparent change in differential input voltage to the

actual change in common-mode voltage. It is expressed in dBs.

The AD7742 uses differential inputs to provide common-mode

noise rejection (i.e., the converted result will correspond to the

differential voltage between the two inputs). The absolute voltage

on both inputs must lie between +0.5 V and V_DD–1.75 V.

REV. 0

–7–

1...4 5 678 9 10...12

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