AD7390/AD7391–SPECIFICATIONS
(@ VREF IN = 2.5 V, –40ꢂC < TA < +85ꢂC unless otherwise noted.)
AD7390 ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
3 V ꢃ 10% 5 V ꢃ 10%
Unit
STATIC PERFORMANCE
Resolution1
N
12
1.6
2.0
0.9
1
4.0
8
20
16
12
1.6
2
0.9
1
4.0
8
20
16
Bits
Relative Accuracy2
INL
INL
DNL
DNL
VZSE
VFSE
VFSE
TCVFS
TA = 25°C
LSB max
LSB max
LSB max
LSB max
mV max
mV max
mV max
ppm/°C typ
TA = ꢀ40°C, ꢁ85°C
TA = 25°C, Monotonic
Monotonic
Differential Nonlinearity2
Zero-Scale Error
Full-Scale Voltage Error
Data = 000H
TA = 25°C, 85°C, Data = FFFH
TA = ꢀ40°C, Data = FFFH
Full-Scale Tempco3
REFERENCE INPUT
VREF IN Range
VREF
RREF
CREF
0/VDD
2.5
5
0/VDD
2.5
5
V min/max
MΩ typ4
pF typ
Input Resistance
Input Capacitance3
ANALOG OUTPUT
Output Current (Source)
Output Current (Sink)
Capacitive Load3
IOUT
IOUT
CL
Data = 800H, ∆VOUT = 5 LSB
Data = 800H, ∆VOUT = 5 LSB
No Oscillation
1
3
100
1
3
100
mA typ
mA typ
pF typ
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance3
VIL
VIH
IIL
0.5
0.8
V max
V min
µA max
pF max
VDD ꢀ 0.6
VDD ꢀ 0.6
10
10
10
10
CIL
INTERFACE TIMING3, 5
Clock Width High
Clock Width Low
Load Pulsewidth
Data Setup
Data Hold
Clear Pulsewidth
Load Setup
tCH
tCL
tLDW
tDS
tDH
tCLRW
tLD1
tLD2
50
50
30
10
30
15
30
40
30
30
20
10
15
15
15
20
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
Load Hold
AC CHARACTERISTICS6
Output Slew Rate
Settling Time
DAC Glitch
Digital Feedthrough
Feedthrough
SR
tS
Q
Data = 000H to FFFH to 000H
To ꢂ0.1% of Full Scale
Code 7FFH to 800H to 7FFH
0.05
70
65
15
ꢀ63
0.05
60
65
15
ꢀ63
V/µs typ
µs typ
nVs typ
nVs typ
dB typ
Q
VOUT/VREF VREF = 1.5 VDC ꢁ 1 V p-p,
Data = 000H, f = 100 kHz
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
VDD RANGE DNL < 1 LSB
2.7/5.5
55
100
300
0.006
2.7/5.5
55
100
500
0.006
V min/max
µA typ
IDD
IDD
VIL = 0 V, No Load, TA = 25°C
VIL = 0 V, No Load
µA max
Power Dissipation
Power Supply Sensitivity
PDISS
PSS
VIL = 0 V, No Load
µW max
%/% max
∆VDD
=
5%
NOTES
1One LSB = VREF/4096 V for the 12-bit AD7390.
2The first two codes (000H, 001H) are excluded from the linearity error measurement.
3These parameters are guaranteed by design and not subject to production testing.
4Typicals represent average readings measured at 25°C.
5All input control signals are specified with tR
= tF = 2 ns (10% to 90% of 3 V) and timed from a voltage level of 1.6 V.
6The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground.
Specifications subject to change without notice.
–2–
REV. A